TDA9109SN View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'TDA9109SN' PDF : 30 Pages View PDF
TDA9109/SN
OPERATING DESCRIPTION (continued)
Figure 7
PLL1F
7
1.8kΩ
1µF
4.7µF
The PLL1 is internally inhibited during extracted ver-
tical sync (if any) to avoid taking in account missing
Figure 8 : Block Diagram
H/HVIN 1
INPUT
INTERFACE
Tramext
LOCKDET
COMP1
E2
High
Low
pulses or wrong pulses on phase comparator.
The inhibition is done by a switch located between
the charge pump and the filter (see Figure 8).
The VCO uses an external RC network. It delivers
a linear sawtooth obtained by the charge and the
discharge of the capacitor, with a current propor-
tional to the current in the resistor. The typical
thresholds of the sawtooth are 1.6V and 6.4V.
The control voltage of the VCO is between 1.33V
and 6V (see Figure 9). The theorical frequency
range of this VCO is in the ratio of 1 to 4.5. The
effective frequency range ha s to be smaller
(1 to 4.2) due to clamp intervention on the filter
lowest value.
Lock/Unlock
PLL1F R0 C0
Status
Tramext
I2C
7
65
Forced
Frequency
CHARGE
PUMP
PLL
INHIBITION
HPOSITION
8
PHASE
ADJUST
VCO
I2C
HPOS
Adj.
OSC
Figure 9 : Details of VCO
PLL1F
(Loop Filter)
7
(1.3V < V7 < 6V)
I0
I0
2
6
4 I0
R0
6.4V
1.6V
RS
FLIP FLOP
5
6.4V
C0
1.6V
0 0.875TH TH
18/30
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