TGA2511
Recommended Chip Assembly Diagram (Con’t)
Option 2: Self Bias - With Gain Control
Vctrl
Vd
100pF 100pF
RF In
RF Out
All DC connections may be brought in from either side of the chip (Use Pad 5 or 9, and Pad 6 or 8)
0.01uF external Caps are recommended on Drain line
Bias: Vd = 5V (Id = ~80mA), Vctrl = 0 to +5V for Gain adjustment
13
TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 Info-mmw@tqs.com
March 2010 © Rev A