TGA2511 View Datasheet(PDF) - TriQuint Semiconductor
Part Name
Description
MFG CO.
'TGA2511' PDF : 14 Pages View PDF
TGA2511
Recommended Chip Assembly Diagram (Con’t)
Option 3: Gate Bias - With Gain Control
Vg
Vctrl
Vd
100pF 100pF 100pF
RF In
RF Out
All DC connections may be brought in from either side of the chip (Use Pad 4 or 10, Pad 5 or 9, and Pad 6 or 8)
0.01uF external Caps are recommended on Drain, Gate line, 10 ohm external
series R between 100pF cap and 0.01uF cap is recommended for Gate line
Source connections (Pad 2, 3, 11, 12) are bonded to ground. All four bond wires are required for stability.
Bias: Vd = 5V , Vctrl = 0 to +5V for Gain adjustment
Vg = Range, -0.5 to 0, typically ~ -0.1 will provide ~160mA of Id.
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TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 Info-mmw@tqs.com
March 2010 © Rev A
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