UPD78P4916GF-3BA View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
MFG CO.
'UPD78P4916GF-3BA' PDF : 56 Pages View PDF
µPD78P4916
Figure 4-4. Operation Timing in Byte Programming Mode
Programming
Program verify
A0 - A16
Address input
Hi-Z
D0 - D7
Data input
Hi-Z
Hi-Z
Data output
VPP
VPP
VDD
VDD+1.5
VDD
VDD
VIH
CE
VIL
VIH
PGM
VIL
VIH
OE
VIL
Cautions 1. Apply voltage to VDD before applying voltage to VPP, and cut off VDD voltage after VPP voltage
is cut off.
2. The voltage including overshoot applied to VPP pin must be kept less than +13.5 V.
3. If a device is inserted or removed while +12.5 V is applied to VPP pin, it may be adversely
affected in reliability.
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