VIS
Preliminary
VG4616321B/VG4616322B
262,144x32x2-Bit
CMOS Synchronous Graphic RAM
Figure 8. Power Down Mode and Clock Mask
(Burst Length = 4, CAS Burst Length = 4, CAS Latency = 2)
CLK
CKE
CS
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
t
CK2
tIS
tPDE
Valid
RAS
CAS
WE
DSF
BS
A9
RAx
A0 ~ A8
RAx
CAx
DQM
DQ
Hi-Z
Ax0 Ax1
tHZ
Ax2
Ax3
ACTIVE
Activate
Command
Bank A
STANDBY
Read
Command
Bank A
Power Down Power Down
Mode Entry Mode Exit
Clock Mask Clock Mask
Start
End
PRECHARGE
Precharge STANDBY
Command
Bank A
Power Down
Mode Entry
Power Down
Mode Exit
Any
Command
Document:1G5-0145
Rev.1
Page 38