Colour Processor Interface ASIC
When CPiA switches from pass-through into manual mode it locks the state of the pass-through port control
signals and prevents the pass-through status signals from being echoed back to the host. The host can now
communicate as it wishes with CPiA without the pass-through device being aware of any activity on the
parallel port.
2.2.5.17 IEEE 1284 Mode Handshake Values
The following table shows the timing values of the parallel port interface in terms of the signal transitions
defined in the IEEE Std 1284 figures 3 through 23.
Figure 2.18 : IEEE 1284 Mode Handshake Values
Time
TH
T
TL
TR
TS
TP
TD
Minimum
0
0
70 ns
70 ns
(note 3)
0.5 µs
0
Maximum
0.5 s(note 1)
10 ms (note 2)
Description
Host response time
Infinite response time
Peripheral response time
Peripheral response time
(ECP Mode only )
Host recovery time
(ECP Mode only)
Minimum setup or pulse width
Minimum data setup time
(ECP Mode only)
Notes:
1 - A delay of more than this period during a Command/Status transfer can cause the watchdog reset circuitry on
CPiA to time out and generate a system reset.
2 - Normally 10ms, however, certain commands being issued to CPiA can caused this to increase to 40ms
3 - As an ECP Forward Channel stall condition will never be generated by CPiA, the Host Transfer Recovery hand-
shake is not supported.
V:\apps\cpia\docs\cpia datasheet\cpia_datasheet4.fm
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