VV0670P001 View Datasheet(PDF) - Vision
Part Name
Description
MFG CO.
'VV0670P001' PDF : 36 Pages View PDF
Colour Processor Interface ASIC
This output consists mainly of a trace of all command and status data that has been received/transmitted
over the host parallel port or USB interfaces.
The serial UART Tx signal is used to output diagnostic information. The Rx input is not used to receive serial
data, but the Control Processor does check it’s state after power up, or reset. If it is LO at this time the Control
Processor enters a continuous Self-test Mode which it will remain in until the next system reset.
2.2.6.21 Control Processor Tasks
The Control Processor is responsible for a variety of functions necessary for the operation of the CPIA
device. In brief these functions are:
• Initialisation of VP and VC modules
• Host communications via Parallel Port IEEE 1284 protocol
• Supervision of host USB interface
• Host command execution
• Image Capture / Compression Control
• Camera Auto Exposure
• Camera Auto White Balance
• Production system selftest diagnostics
• Diagnostic debug output
2.2.6.22 Selftest Diagnostics
If the Serial UART input Rx is pulled LO when the system is released from reset the Control Processor will
enter Self-test Diagnostics Mode. It will continuously run a set of system level tests and output the result on
the Serial UART Tx output. The serial format used is 19200 baud, 8-bit data, no parity, 1 stop bit, no flow
control.
Below is typical output from the Selftest Mode.
====== CPIA Ver 1-20 ======
Continuous Selftest ...
1 - VP_EN
2 - VC_INT
3 - Host port
4 - Pass-thru port
5 - USB core
--------
--------
--------
Fail
--------
6 - VC register
7 - DRAM access
8 - VP register
9 - Frame grab
10 - VP data
--------
--------
--------
--------
--------
It should be noted that several of these self-tests where designed to test system level connectivity between
the VP, VC and CP modules during the device development phase, and are now effectively obseleted with
the full intergrated CPiA device.
These self-tests do not attempt to test in anyway the connectivity, or correct operation, of the interface to the
sensor.
VP_EN Test
Tests an internal CPiA control signal - should never fail.
VC_INT Test
Tests an internal CPiA control signal - should never fail.
Host Port
Tests for short circuits between signals on the Host Parallel port. Will fail if the camera is plugged in a host.
V:\apps\cpia\docs\cpia datasheet\cpia_datasheet4.fm
02/07/98
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