WED2ZLRSP01S50BC View Datasheet(PDF) - White Electronic Designs Corporation

Part Name

Description

MFG CO.

WED2ZLRSP01S50BC

512K x 32/256K x 32 Dual Array Synchronous Pipeline Burst NBL SRAM

White Electronic Designs Corporation 

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White Electronic Designs

WED2ZLRSP01S

FIG. 7 TIMING WAVEFORM OF CE# OPERATION

Clock

tCSS tCSH

CKE#

Address

A1

A2

A3

A4

A5

WRITE#

CEx#

ADV

OE#

Data Out

Data In

tOE

tLZOE

Q1

tHZC

Q2

tCD

tLZC

Q4

tDS tDH

D3

NOTES:

WRITE# = L means WE# = L, and BWx# = L

CEx# refers to the combination of CE1#, CE2 and CE2#.

Note:

Applies to both independent arrays.

tCH tCL

tCYC

D5

Dont Care

Undefined

White Electronic Designs Corp. reserves the right to change products or specifications without notice.

April, 2002

Rev. 0

12

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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