WM8742 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'WM8742' PDF : 65 Pages View PDF
Production Data
DSD AUDIO INTERFACE TIMINGS
DSD[0:1]
DSDCLK64
D[n-1]
tDC
D[n]
t64CY
t64L
tDS
Figure 3 DSD Audio Timing - Normal Mode
WM8742
tDH
D[n+1]
t64H
Figure 4 DSD Audio Timing - Phase Modulated Mode
Test Conditions
DVDD = 3.3V, GND = 0V, TA = +25oC, fs = 44.1kHz, DSDCLK64 = 64fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
Audio Data Input Timing Information
DSDCLK64 cycle time
t64CY
DSDCLK64 pulse width high
t64H
DSDCLK64 pulse width low
t64L
DSD[0:1] set-up time to
tDSN
DSDCLK64 rising edge
DSD[0:1] hold time from
tDHN
DSDCLK64 rising edge
Difference in edge timing of
tDC
DSD[0:1] to DSDCLK64
Table 3 DSD Audio Interface Timing Requirements
MIN
TYP
354.3
140
140
20
20
-10
MAX
10
UNIT
ns
ns
ns
ns
ns
ns
w
PD, Rev 4.3, February 2013
13
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