WM8766 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'WM8766' PDF : 36 Pages View PDF
Production Data
WM8766
DAC DIGITAL VOLUME CONTROL
The DAC volume may also be adjusted in the digital domain using independent digital attenuation
control registers
REGISTER
BIT
LABEL
DEFAULT
ADDRESS
DESCRIPTION
0000000
Digital
Attenuation
DACL1
7:0 LDA1[7:0] 11111111 Digital Attenuation data for Left channel DACL1 in 0.5dB steps. See
(0dB)
Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store LDA1 in intermediate latch (no change to output)
1: Store LDA1 and update attenuation on all channels
0000001
Digital
Attenuation
DACR1
7:0 RDA1[6:0] 11111111 Digital Attenuation data for Right channel DACR1 in 0.5dB steps.
(0dB)
See Table 16.
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store RDA1 in intermediate latch (no change to output)
1: Store RDA1 and update attenuation on all channels.
0000100
Digital
Attenuation
DACL2
7:0 LDA2[7:0] 11111111 Digital Attenuation data for Left channel DACL2 in 0.5dB steps. See
(0dB)
Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store LDA2 in intermediate latch (no change to output)
1: Store LDA2 and update attenuation on all channels.
0000101
Digital
Attenuation
DACR2
7:0 RDA2[7:0] 11111111 Digital Attenuation data for Right channel DACR2 in 0.5dB steps.
(0dB)
See Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store RDA2 in intermediate latch (no change to output)
1: Store RDA2 and update attenuation on all channels.
0000110
Digital
Attenuation
DACL3
7:0 LDA3[7:0] 11111111 Digital Attenuation data for Left channel DACL3 in 0.5dB steps. See
(0dB)
Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store LDA3 in intermediate latch (no change to output)
1: Store LDA3 and update attenuation on all channels.
0000111
Digital
Attenuation
DACR3
7:0 RDA3[7:0] 11111111 Digital Attenuation data for Right channel DACR3 in 0.5dB steps.
(0dB)
See Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store RDA3 in intermediate latch (no change to output)
1: Store RDA3 and update attenuation on all channels.
0001000
7:0 MASTDA 11111111 Digital Attenuation data for all DAC channels in 0.5dB steps. See
Master
[7:0]
(0dB)
Table 16
Digital
Attenuation
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
(all channels)
0: Store gain in intermediate latch (no change to output)
1: Store gain and update attenuation on all channels.
Note:
When MCLK is removed, digital volume settings are re-set to default (0dB). When MCLK is re-applied, the user
must write the desired volume level to the volume control registers.
L/RDAX[7:0]
ATTENUATION LEVEL
00(hex)
-∞ dB (mute)
01(hex)
-127dB
:
:
:
:
:
:
FE(hex)
-0.5dB
FF(hex)
0dB
Table 16 Digital Volume Control Attenuation Levels
w
PD Rev 4.1 July 2005
29
Share Link: 
