Production Data
WM8804
NON-AUDIO DETECTION
The SPDIF payload can contain PCM data for audio or non-audio applications. In the case where the
payload contains the 96 bit synchronization code defined in IEC61937 then this indicates that the
payload contains data which is not suitable for direct playback through an audio codec. This 96 bit
code is defined as 4*16bits of ‘0’+Pa (16bits)+Pb (16bits)..
If the S/PDIFRx interface decodes this sync code then it sets the PCM_N bit.
When the PCM_N =1, then it indicates non-audio data. When the PCM_N =0, then it indicates that
the SPDIF payload does not contain the synch code..
Another status bit, AUDIO_N status is recovered from the Channel Status block. It is bit 1 of the
channel status. When AUDIO_N =0, then it indicates that the SPDIF payload contains audio PCM
encoded data. This is also referred to as linear PCM data. When the AUDIO_N= 1, then it indicates
that the SPDIF payload does not contain audio PCM data.
NON_AUDIO data is indicated by a logical OR of the AUDIO_N and PCM_N flags.
Any change of AUDIO_N or PCM_N status will cause an INT_N interrupt (UPD_NON_AUDIO) to be
generated. If the MASK register bit for AUDIO_N or PCM_N is set, then the associated signal will not
generate an interrupt (UPD_NON_AUDIO).
GENERAL PURPOSE OUTPUT (GPO) CONFIGURATION
The WM8804 has a maximum of three configurable GPO pins depending upon the mode of
operation of the device. By default GPO0 is available, however if 2-wire Software Control Mode is
selected the CSB pin becomes GPO1 and the SDOUT pin becomes GPO2.
REGISTER
ADDRESS
R23
GPO0
17h
R24
GPO1
18h
R26
GPO2
1Ah
BIT
LABEL
DEFAULT
DESCRIPTION
3:0
GPO0[3:0]
0000
Flags and status bits available on GPO pins
(INT_N)
0000 = INT_N
0001 = V
0010 = U
0011 = C
0100 = TRANS_ERR
0101 = SFRM_CLK
3:0
GPO1[3:0]
0111
0110 = 192BLK
(UNLOCK)
0111 = UNLOCK
1000 = NON_AUDIO
1001 = CSUD
1010 = DEEMPH
1011 = CPY_N
1100 = ZEROFLAG
7:4
GPO2[3:0]
0100
1101 = 0
(TRANS_ERR)
↓
1111 = 0
Table 52 GPO Control Registers
w
Note 1: GPO1 and GPO2 are only available in 2-
wire software control mode.
Note 2: Refer to Table 45 for signal descriptions
PD Rev 4.1 September 2007
43