WM8804GEDS/R View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'WM8804GEDS/R' PDF : 66 Pages View PDF
Production Data
DIGITAL ROUTING CONTROL
WM8804
See page 20 for a full description of the signal routing options available in the WM8804. In Software
control mode the value set in register TXSRC determines the S/PDIF transmitter data source. In
hardware control mode the value of TXSRC can be set using the CSB pin.
PIN
(HARDWARE
MODE)
CSB
REGISTER
(SOFTWARE
MODE)
TXSRC
0
S/PDIF Rx
1
AIF Rx
Table 15 S/PDIF Transmitter Digital Routing Control Configuration
AUDIO INTERFACE CONTROL
In software control mode the audio data word length and audio data format can be set independently
for the receiver and transmitter sides of the interface. However, in hardware control mode both sides
of the interface are combined and the configuration is set using SDOUT and GPO0 pins as described
in Table 6 and Table 16. Note that AIF_CONF[1:0] configures the audio interface when the device
operates in hardware mode.
GPO0 /
AIFCONF[1]
SDOUT /
AIFCONF[0]
DESCRIPTION
0
0
0
1
16-bit I2S
24-bit I2S
1
0
24-bit Left Justified With Flags
1
1
16-bit Right Justified
Table 16 Digital Audio Interface Control in Hardware Control Mode
STATUS INFORMATION
In hardware control mode the WM8804 outputs a selection of status flags for the user. Table 17
describes the flags which are available and the output pins on which they are available.
PIN
SCLK
SDOUT
CSB
GPO0
STATUS FLAG
TRANS_ERR
NON_AUDIO
UNLOCK
GEN_FLAG
Table 17 Hardware Control Mode Status Flag Configuration
A full description of the status flags is given in Table 45.
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PD Rev 4.1 September 2007
19
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