WM8960 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'WM8960' PDF : 91 Pages View PDF
WM8960
Production Data
REGISTER
ADDRESS
R0 (00h)
Left Channel
PGA
BIT
8
7
LABEL
IPVU
LINMUTE
6
LIZC
5:0
LINVOL
[5:0]
R1 (01h)
8
Right Channel
PGA
7
IPVU
RINMUTE
6
RIZC
5:0
RINVOL
[5:0]
R23 (17h)
0
Additional
Control (1)
1
TOEN
TOCLKSEL
Table 4 Input PGA Volume Control
DEFAULT
DESCRIPTION
N/A
1
0
010111
( 0dB )
N/A
1
0
010111
( 0dB )
0
0
Input PGA Volume Update
Writing a 1 to this bit will cause left
and right input PGA volumes to be
updated (LINVOL and RINVOL)
Left Input PGA Analogue Mute
1 = Enable Mute
0 = Disable Mute
Note: IPVU must be set to un-mute.
Left Input PGA Zero Cross Detector
1 = Change gain on zero cross only
0 = Change gain immediately
Left Input PGA Volume Control
111111 = +30dB
111110 = +29.25dB
. . 0.75dB steps down to
000000 = -17.25dB
Input PGA Volume Update
Writing a 1 to this bit will cause left
and right input PGA volumes to be
updated (LINVOL and RINVOL)
Right Input PGA Analogue Mute
1 = Enable Mute
0 = Disable Mute
Note: IPVU must be set to un-mute.
Right Input PGA Zero Cross
Detector
1 = Change gain on zero cross only
0 = Change gain immediately
Right Input PGA Volume Control
111111 = +30dB
111110 = +29.25dB
. . 0.75dB steps down to
000000 = -17.25dB
Timeout Enable (Also enables jack
detect debounce clock)
0 = Timeout disabled
1 = Timeout enabled
Slow Clock Selection (Used for
volume update timeouts and for jack
detect debounce)
0 = SYSCLK / 221 (Slower
Response)
1 = SYSCLK / 219 (Faster Response)
See "Volume Updates" for more information on volume update bits, zero cross and timeout operation.
LINE INPUTS
Two pairs of stereo line inputs (LINPUT2 / RINPUT2 and LINPUT3 / RINPUT3) are available as
analogue inputs into the ADC path. LINPUT3 and RINPUT3 can also be input directly to the output
mixers via the bypass paths.
See "Output Signal Path" for more information on the bypass paths.
w
PD, August 2013, Rev 4.2
22
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