XR82C684CJ-F View Datasheet(PDF) - Exar Corporation

Part Name

Description

MFG CO.

XR82C684CJ-F

CMOS Quad Channel UART (QUART)

Exar Corporation 

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XR82C684

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C.1 Interrupt Status Registers (ISR1 and ISR2)

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ISR1 Register Bit Format

Bit 7

Input Port

Change

L:

 L H%

Bit 6

Delta Break

B

L:

 L H%

ISR2 Register Bit Format

Bit 7

Input Port

Change

L:

 L H%

Bit 6

Delta Break

D

L:

 L H%

Bit 5

RXRDY/

FFULLB

L:

 L H%

Bit 5

RXRDY/

FFULL D

L:

 L H%

Bit 4

TXRDYB

L:

 L H%

Bit 3

Counter #1

Ready

L:

 L H%

Bit 2

Delta Break

A

L:

 L H%

Bit 1

RXRDY/

FFULLA

L:

 L H%

Bit 4

TXRDY D

L:

 L H%

Bit 3

Counter #2

Ready

L:

 L H%

Bit 2

Delta Break

C

L:

 L H%

Bit 1

RXRDY/

FFULL C

L:

 L H%

Bit 0

TXRDYA

L:

 L H%

Bit 0

TXRDY C

L:

 L H%

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C.1.1 ISR1 Register - Channels A and B

ISR1[7]: Input Port Change of State:

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Section E

Please note that in order to enable this Interrupt

Condition, the user must do two things:

1. Write the appropriate data to the lower nibble of the

Auxiliary Control Register, ACR1[3:0]. In this step, the

user is specifying which of the four Input Pins, IP0 - IP3,

should trigger an “Input Port Change” Interrupt request.

2. Write a logic “1” to IMR1[7].

ISR1[6] Delta Break Indicator - Channel B:

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ISR1[5] RXRDY/FFULL B - Channel B Receiver

Ready or FIFO Full

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