XRT7300
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.1.1
áç
FIGURE 33. MICROPROCESSOR SERIAL INTERFACE DATA STRUCTURE
CS
SClk
SDI
SDO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
R/W A0 A1 A2 A3 0
High Z
0 A6 D0 D1 D2 D3 D4 D5 D6 D7
High Z
D0 D1 D2 D3 D4 D5 D6 D7
NNootteess: :
--DDeneontoetseas “ado“nd’ot nca’trec”avrael”uevalue
ARRAR4//WW4/Wana==dn=““d01A“””51Aff”oao5rrrfeao““WRrraeelr“wiaRtaaedely””wsaOOad“pp0y”ee”sOr.raa“ptt0iieoo”nn.rass tions
R/W = “0” for “Write” Operations
Figure 34 illustrates how to interface the XRT7300 to
the XRT7234/45 E3/DS3 ATM UNI IC.
For more information on the XRT7234 E3 UNI or the
XRT7245 DS3 UNI IC’s please consult the XRT7234
E3 UNI IC or the XRT7245 DS3 UNI IC Data Sheets.
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