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XRT73L03 View Datasheet(PDF) - Exar Corporation

Part Name
Description
MFG CO.
XRT73L03
Exar
Exar Corporation Exar
'XRT73L03' PDF : 62 Pages View PDF
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XRT73L03 3 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.0.13
áç
PRELIMINARY
TRANSMIT INTERFACE CHARACTERISTICS
RECEIVE INTERFACE CHARACTERISTICS
Accepts either Single-Rail or Dual-Rail data from
Terminal Equipment and generates a bipolar signal
from the line
Integrated Pulse Shaping Circuit.
Built-in B3ZS/HDB3 Encoder (which can be dis-
abled)
Contains Transmit Clock Duty Cycle Correction Cir-
cuit on-chip
Generates pulses that comply with the ITU-T G.703
pulse template for E3 applications
Generates pulses that comply with the DSX-3 pulse
template, as specified in Bellcore GR-499-CORE
and ANSI T1.102_1993
Generates pulses that comply with the STSX-1
pulse template, as specified in Bellcore GR-253-
CORE
Transmitter can be turned off in order to support
redundancy designs
Integrated Adaptive Receive Equalization (optional)
and Timing Recovery
Declares and Clears the LOS defect per ITU-T
G.775 requirements for E3 and DS3 applications
Meets Jitter Tolerance Requirements, as specified
in ITU-T G.823_1993 for E3 Applications
Meets Jitter Tolerance Requirements, as specified
in Bellcore GR-499-CORE for DS3 Applications
Declares Loss of Signal (LOS) and Loss of Lock
(LOL) Alarms
Built-in B3ZS/HDB3 Decoder (which can be dis-
abled)
Recovered Data can be muted while the LOS Con-
dition is declared
Outputs either Single-Rail or Dual-Rail data to the
Terminal Equipment
Receiver can be powered down in order to con-
serve power in redundancy designs
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