XRT79L71
PRELIMINARY
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
LOCAL-TIMING/FRAME SLAVE) MODE OPERATION .......................................................................................................... 283
FIGURE 133. AN ILLUSTRATION OF THE BEHAVIOR OF THE SYSTEM-SIDE TERMINAL EQUIPMENT SIGNALS FOR MODE 5 (NIBBLE-PARALLEL/
LOCAL-TIMING/FRAME SLAVE) MODE OPERATION .......................................................................................................... 284
5.2.1.6 MODE 6 - NIBBLE-PARALLEL/LOCAL-TIMING/FRAME MASTER MODE OPERATION FOR THE TRANSMIT PAYLOAD DATA IN-
PUT INTERFACE BLOCK ........................................................................................................................................... 285
FIGURE 134. AN ILLUSTRATION OF HOW TO INTERFACE THE SYSTEM-SIDE TERMINAL EQUIPMENT SIGNALS FOR MODE 6 (NIBBLE-PARALLEL/
LOCAL-TIMING/FRAME MASTER) MODE OPERATION ....................................................................................................... 286
FIGURE 135. AN ILLUSTRATION OF THE BEHAVIOR OF THE SYSTEM-SIDE TERMINAL EQUIPMENT SIGNALS FOR MODE 6 (NIBBLE-PARALLEL/
LOCAL-TIMING/FRAME MASTER) MODE OPERATION ....................................................................................................... 287
5.2.1.7 OPERATING THE TRANSMIT PAYLOAD DATA INPUT INTERFACE IN THE GAPPED CLOCK MODE .............................. 288
FIGURE 136. AN ILLUSTRATION OF HOW TO INTERFACE THE SYSTEM-SIDE TERMINAL EQUIPMENT TO THE TRANSMIT PAYLOAD DATA INPUT
INTERFACE BLOCK (OF THE XRT79L71) FOR GAPPED-CLOCK MODE OPERATIONS ......................................................... 290
FIGURE 137. AN ILLUSTRATION OF HOW TO INTERFACE THE SYSTEM-SIDE TERMINAL EQUIPMENT TO THE TRANSMIT PAYLOAD DATA INPUT
INTERFACE BLOCK OF THE XRT79L71 FOR NIBBLE-PARALLEL GAPPED-CLOCK MODE OPERATIONS................................ 292
5.2.1.8 ACCEPTING AND INSERTING E3 OVERHEAD BYTES VIA THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK . 292
5.2.2 TRANSMIT OVERHEAD DATA INPUT INTERFACE BLOCK ................................................................................. 292
FIGURE 138. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE TRANSMIT DIRECTION CIRCUITRY, WHENEVER THE XRT79L71
HAS BEEN CONFIGURED TO OPERATE IN THE E3, ITU-T G.751 CLEAR-CHANNEL FRAMER MODE (WITH THE TRANSMIT OVERHEAD
DATA INPUT INTERFACE BLOCK HIGHLIGHTED)................................................................................................................ 293
TABLE 38: HOW THE TRANSMIT E3 FRAMER BLOCK INTERNALLY GENERATES EACH OF THE OVERHEAD BITS/BYTES - E3, ITU-T G.751 AP-
PLICATIONS................................................................................................................................................................... 294
TABLE 39: LIST AND DESCRIPTION OF THE PINS ASSOCIATED WITH THE TRANSMIT OVERHEAD DATA INPUT INTERFACE BLOCK ....... 295
5.2.2.1 OPERATING THE TRANSMIT OVERHEAD DATA INPUT INTERFACE BLOCK USING METHOD 1 - THE TXOHCLK METHOD 296
FIGURE 139. ILLUSTRATION OF HOW TO INTERFACE THE SYSTEM-SIDE TERMINAL EQUIPMENT TO THE TRANSMIT OVERHEAD DATA INPUT
INTERFACE BLOCK WHEN USING METHOD 1 ................................................................................................................... 296
TABLE 40: THE RELATIONSHIP BETWEEN THE NUMBER OF RISING CLOCK EDGES IN THE TXOHCLK SIGNAL, SINCE THE TXOHFRAME SIGNAL
WAS LAST SAMPLED "HIGH" TO THE E3 OVERHEAD BIT THAT IS BEING PROCESSED BY THE TRANSMIT OVERHEAD DATA INPUT
INTERFACE BLOCK ........................................................................................................................................................ 297
FIGURE 140. ILLUSTRATION OF THE SIGNALING THAT MUST OCCUR BETWEEN THE SYSTEM-SIDE TERMINAL EQUIPMENT AND THE TRANSMIT
OVERHEAD DATA INPUT INTERFACE OF THE XRT79L71, IN ORDER TO CONFIGURE THE XRT79L71 TO TRANSMIT THE FERF/RDI
INDICATOR TO THE REMOTE TERMINAL EQUIPMENT (USING METHOD 1)........................................................................... 298
5.2.2.2 OPERATING THE TRANSMIT OVERHEAD DATA INPUT INTERFACE BLOCK USING METHOD 2 - THE TXINCLK/TXOHENABLE
METHOD ................................................................................................................................................................. 299
FIGURE 141. ILLUSTRATION OF HOW TO INTERFACE THE SYSTEM-SIDE TERMINAL EQUIPMENT TO THE TRANSMIT OVERHEAD DATA INPUT
INTERFACE BLOCK WHEN USING METHOD 2 ................................................................................................................... 300
TABLE 41: THE RELATIONSHIP BETWEEN THE NUMBER OF PULSES IN THE TXOHENABLE SIGNAL, SINCE THE TXOHFRAME SIGNAL WAS LAST
SAMPLED "HIGH" TO THE E3 OVERHEAD BIT THAT IS CURRENTLY BEING PROCESSED BY THE TRANSMIT OVERHEAD DATA INPUT
INTERFACE BLOCK ........................................................................................................................................................ 301
FIGURE 142. ILLUSTRATION OF THE SIGNALING THAT MUST OCCUR BETWEEN THE SYSTEM-SIDE TERMINAL EQUIPMENT AND THE TRANSMIT
OVERHEAD DATA INPUT INTERFACE OF THE XRT79L71, IN ORDER TO CONFIGURE THE XRT79L71 TO TRANSMIT THE FERF/RDI
INDICATOR TO THE REMOTE TERMINAL EQUIPMENT (USING METHOD 2)........................................................................... 302
5.2.3 TRANSMIT LAPD CONTROLLER BLOCK .............................................................................................................. 303
FIGURE 143. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE TRANSMIT DIRECTION CIRCUITRY, WHENEVER THE XRT79L71
HAS BEEN CONFIGURED TO OPERATE IN THE E3, ITU-T G.751 CLEAR-CHANNEL FRAMER MODE (WITH THE TRANSMIT LAPD CON-
TROLLER BLOCK HIGHLIGHTED). .................................................................................................................................... 304
FIGURE 144. LAPD MESSAGE FRAME FORMAT ............................................................................................................................ 305
TABLE 42: THE LAPD MESSAGE TYPE AND THE CORRESPONDING VALUE OF THE FIRST BYTE, WITHIN THE INFORMATION PAYLOAD (FOR
STANDARD 76 OR 82 BYTE MESSAGES).......................................................................................................................... 306
5.2.3.1 TRANSMITTING STANDARD-TYPE (76 OR 82 BYTE SIZE) LAPD MESSAGES ........................................................... 306
TABLE 43: A MAPPING OF THE VALUE TO BE WRITTEN INTO INDIRECT ADDRESS LOCATION 0X11B0 AND THE CORRESPONDING PMDL MES-
SAGE............................................................................................................................................................................ 310
FIGURE 145. FLOW-CHART DEPICTING AN APPROACH THAT ONE CAN USE TO WRITING THE PAYLOAD PORTION OF THE LAPD/PMDL MES-
SAGE INTO THE TRANSMIT LAPD MESSAGE BUFFER...................................................................................................... 312
5.2.3.2 TRANSMITTING NON-STANDARD VARIABLE LENGTH (E.G., UP TO 82 BYTES) LAPD MESSAGES ............................ 314
FIGURE 146. FLOW-CHART DEPICTING AN APPROACH THAT ONE CAN USE TO WRITING IN THE REMAINING BYTES OF THE OUTBOUND MES-
SAGE INTO THE TRANSMIT LAPD MESSAGE BUFFER...................................................................................................... 318
5.2.3.3 Transmit -LAPD Contro;ller Block Interrupt ................................................................................................. 321
5.2.4 TRANSMIT E3 FRAMER BLOCK ............................................................................................................................. 321
FIGURE 147. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE TRANSMIT DIRECTION CIRCUITRY, WHENEVER THE XRT79L71
HAS BEEN CONFIGURED TO OPERATE IN THE E3, ITU-T G.751 CLEAR-CHANNEL FRAMER MODE (WITH THE "TRANSMIT DS3/E3
FRAMER" BLOCK HIGHLIGHTED) ..................................................................................................................................... 322
5.2.4.1 TRANSMITTING THE LOS PATTERN ............................................................................................................ 322
5.2.4.2 TRANSMITTING THE E3 AIS PATTERN ........................................................................................................ 323
5.2.4.3 TRANSMITTING THE FERF/RDI INDICATOR ................................................................................................ 323
5.2.4.4 TRANSMITTING THE FEBE/REI (FAR-END BLOCK ERROR/REMOTE ERROR) INDICATOR .................. 324
FIGURE 148. A SIMPLE ILLUSTRATION OF A "NEAR-END" TERMINAL EXCHANGING E3 DATA WITH A REMOTE TERMINAL, IN AN UN-ERRED MAN-
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