XRT79L71IB View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT79L71IB' PDF : 441 Pages View PDF
PRELIMINARY
XRT79L71
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
DATA OUTPUT INTERFACE BLOCK.................................................................................................................................. 570
6.3.7 RECEIVE PAYLOAD DATA OUTPUT INTERFACE BLOCK .................................................................................. 571
FIGURE 261. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE RECEIVE DIRECTION CIRCUITRY, WHENEVER THE XRT79L71 HAS
BEEN CONFIGURED TO OPERATE IN THE E3, ITU-T G.832 CLEAR-CHANNEL FRAMER MODE (WITH THE "RECEIVE PAYLOAD DATA
OUTPUT INTERFACE" BLOCK HIGHLIGHTED).................................................................................................................... 572
TABLE 73: LIST AND DESCRIPTION OF THE PINS ASSOCIATED WITH THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE BLOCK ........ 573
6.3.7.1 SERIAL MODE OPERATION OF THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE ................................................ 576
FIGURE 262. AN ILLUSTRATION OF HOW TO INTERFACE THE "SYSTEM-SIDE TERMINAL EQUIPMENT" TO THE "RECEIVE PAYLOAD DATA OUT-
PUT INTERFACE" BLOCK (OF THE XRT79L71) FOR "SERIAL MODE" OPERATION .............................................................. 576
FIGURE 263. AN ILLUSTRATION OF THE BEHAVIOR OF THE "SYSTEM-SIDE TERMINAL EQUIPMENT" SIGNALS FOR "SERIAL MODE" OPERATION
577
FIGURE 264. AN ILLUSTRATION OF HOW TO INTERFACE THE "SYSTEM-SIDE" TERMINAL EQUIPMENT TO THE "RECEIVE PAYLOAD DATA INPUT
INTERFACE" BLOCK (OF THE XRT79L71) FOR "GAPPED-CLOCK" MODE OPERATIONS ..................................................... 579
6.3.7.2 NIBBLE-PARALLEL MODE OPERATION OF THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE ............................... 579
FIGURE 265. AN ILLUSTRATION OF HOW TO INTERFACE THE "SYSTEM-SIDE TERMINAL EQUIPMENT" TO THE "RECEIVE PAYLOAD DATA OUT-
PUT INTERFACE" BLOCK (OF THE XRT79L71) FOR "NIBBLE-PARALLEL MODE" OPERATION.............................................. 580
FIGURE 266. AN ILLUSTRATION OF THE BEHAVIOR OF THE "SYSTEM-SIDE TERMINAL EQUIPMENT" SIGNALS FOR "NIBBLE-PARALLEL MODE"
OPERATION .................................................................................................................................................................. 581
7.0 DIAGNOSTIC OPERATION - CLEAR-CHANNEL FRAMER MODE ................................................ 581
7.1 THE LOOPBACK MODES AVAILABLE WITHIN THE XRT79L71 .............................................................. 581
7.1.1 THE LIU ANALOG LOCAL LOOP-BACK MODE .................................................................................................... 582
FIGURE 267. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE XRT79L71 (WHEN CONFIGURED TO OPERATE IN THE CLEAR-
CHANNEL FRAMER" MODE) WITH THE "LIU ANALOG LOCAL LOOP-BACK" PATH INDICATED ............................................... 582
7.1.2 THE LIU DIGITAL LOCAL LOOP-BACK MODE...................................................................................................... 584
FIGURE 268. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE XRT79L71 (WHEN CONFIGURED TO OPERATE IN THE "CLEAR-
CHANNEL FRAMER" MODE) WITH THE "LIU DIGITAL LOCAL LOOP-BACK" PATH INDICATED................................................ 584
7.1.3 THE LIU REMOTE LOOP-BACK MODE .................................................................................................................. 585
FIGURE 269. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE XRT79L71 (WHEN CONFIGURED TO OPERATE IN THE "CLEAR-
CHANNEL FRAMER" MODE) WITH THE "LIU REMOTE LOOP-BACK" PATH INDICATED ......................................................... 586
7.1.4 THE FRAMER LOCAL LOOP-BACK MODE ........................................................................................................... 587
FIGURE 270. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE XRT79L71 (WHEN CONFIGURED TO OPERATE IN THE "CLEAR-
CHANNEL FRAMER" MODE) WITH THE "FRAMER LOCAL LOOP-BACK" PATH INDICATED ..................................................... 588
7.2 USING THE PRBS PATTERN GENERATOR AND RECEIVER .................................................................. 589
7.2.1 ENABLING THE PRBS PATTERN GENERATOR AND RECEIVER....................................................................... 590
7.2.2 CHECKING FOR "PRBS LOCK".............................................................................................................................. 590
7.2.3 CHECKING FOR PRBS BIT ERRORS ..................................................................................................................... 591
ORDERING INFORMATION .......................................................................................... 593
PACKAGE DIMENSIONS .............................................................................................. 593
208 SHRINK THIN BALL GRID ARRAY (17.0 MM X 17.0 MM, STBGA) ............................................... 593
REVISION HISTORY .................................................................................................................................... 594
XVI
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