XRT79L71IB View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT79L71IB' PDF : 609 Pages View PDF
PRELIMINARY
XRT79L71
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
PUT INTERFACE" BLOCK (OF THE XRT79L71) FOR SERIAL MODE OPERATION ................................................................ 416
FIGURE 190. AN ILLUSTRATION OF THE BEHAVIOR OF THE "SYSTEM-SIDE TERMINAL EQUIPMENT" SIGNALS FOR "SERIAL MODE" OPERATION
417
FIGURE 191. AN ILLUSTRATION OF HOW TO INTERFACE THE "SYSTEM-SIDE" TERMINAL EQUIPMENT TO THE "RECEIVE PAYLOAD DATA INPUT
INTERFACE" BLOCK (OF THE XRT79L71) FOR "GAPPED-CLOCK" MODE OPERATIONS ..................................................... 419
5.3.5.2 NIBBLE-PARALLEL MODE OPERATION OF THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE ............................... 419
FIGURE 192. AN ILLUSTRATION OF HOW TO INTERFACE THE "SYSTEM-SIDE TERMINAL EQUIPMENT" TO THE "RECEIVE PAYLOAD DATA OUT-
PUT INTERFACE" BLOCK (OF THE XRT79L71) FOR "NIBBLE-PARALLEL MODE" OPERATION.............................................. 420
FIGURE 193. AN ILLUSTRATION OF THE BEHAVIOR OF THE "SYSTEM-SIDE TERMINAL EQUIPMENT" SIGNALS FOR "NIBBLE-PARALLEL MODE"
OPERATION .................................................................................................................................................................. 421
6.0 ARCHITECTURAL/FUNCTIONAL DESCRIPTION OF THE XRT 79L71 - E3, ITU-T G.832 MODE OPER-
ATION .................................................................................................................................................. 421
6.1 DESCRIPTION OF THE E3, ITU-T G.832 FRAME STRUCTURE AND OVERHEAD BITS ........................ 421
FIGURE 194. ILLUSTRATION OF THE E3, ITU-T G.832 FRAMING FORMAT ...................................................................................... 422
TABLE 52: THE RELATIONSHIP BETWEEN THE CONTENTS OF BITS 2 (FRAME FORMAT) AND 6 (ISDS3) WITHIN THE FRAMER OPERATING MODE
REGISTER, AND THE RESULTING FRAMING FORMAT........................................................................................................ 423
TABLE 53: THE BYTE-FORMAT OF THE TRAIL-TRACE MESSAGE THAT THIS BEING TRANSPORTED VIA AN E3 DATA-STREAM VIA THE TR BYTE
424
FIGURE 195. THE BIT FORMAT OF THE POST OCTOBER 1988 VERSION OF THE MA BYTE ............................................................. 425
FIGURE 196. A SIMPLE ILLUSTRATION OF A NEAR-END TERMINAL EXCHANGING E3 DATA WITH A REMOTE TERMINAL, IN AN UN-ERRED MAN-
NER.............................................................................................................................................................................. 426
FIGURE 197. A SIMPLE ILLUSTRATION OF THE NEAR-END TERMINAL TRANSMITTING THE UN-ERRED INDICATION TO THE REMOTE TERMINAL
EQUIPMENT .................................................................................................................................................................. 426
FIGURE 198. A SIMPLE ILLUSTRATION OF A NEAR-END TERMINAL DECLARING THE LOS DEFECT CONDITION WITHIN ITS INCOMING E3 SIGNAL
427
FIGURE 199. A SIMPLE ILLUSTRATION OF THE NEAR-END TERMINAL EQUIPMENT TRANSMITTING THE FERF/RDI INDICATOR TO THE REMOTE
TERMINAL EQUIPMENT ................................................................................................................................................... 427
FIGURE 200. A SIMPLE ILLUSTRATION OF A NEAR-END TERMINAL EXCHANGING E3 DATA WITH A REMOTE TERMINAL, IN AN UN-ERRED MAN-
NER.............................................................................................................................................................................. 428
FIGURE 201. A SIMPLE ILLUSTRATION OF THE NEAR-END TERMINAL TRANSMITTING THE UN-ERRED INDICATION TO THE REMOTE TERMINAL
EQUIPMENT .................................................................................................................................................................. 428
FIGURE 202. A SIMPLE ILLUSTRATION OF A NEAR-END TERMINAL DETECTING EM BYTE ERRORS WITHIN ITS INCOMING E3 SIGNAL.. 429
FIGURE 203. A SIMPLE ILLUSTRATION OF THE NEAR-END TERMINAL EQUIPMENT TRANSMITTING THE FEBE/REI INDICATOR TO THE REMOTE
TERMINAL EQUIPMENT ................................................................................................................................................... 429
TABLE 54: THE RELATIONSHIP BETWEEN THE CONTENTS OF THE PAYLOAD TYPE[2:0] BIT-FIELDS AND THE TYPE OF DATA BEING TRANSPORT-
ED VIA THE PAYLOAD BYTES WITHIN A GIVEN E3 DATA-STREAM ...................................................................................... 430
TABLE 55: THE RELATIONSHIP BETWEEN THE VALUES OF BITS 6 AND 7 (SSM MULTI-FRAME INDICATOR) AND THE SSM BIT THAT IS BEING
TRANSPORTED VIA BIT 8 (SSM BIT) WITHIN THE MA BYTE OF THE CURRENT E3 FRAME ................................................. 430
................................................................................................................................................................. 431
6.2 THE TRANSMIT DIRECTION - E3, ITU-T G.832 CLEAR-CHANNEL FRAMER APPLICATIONS ............. 431
FIGURE 204. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE TRANSMIT DIRECTION CIRCUITRY WHENEVER THE XRT79L71
HAS BEEN CONFIGURED TO OPERATE IN THE E3, ITU-T G.832 CLEAR-CHANNEL FRAMER MODE .................................... 432
6.2.1 TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK.................................................................................... 432
FIGURE 205. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE TRANSMIT DIRECTION CIRCUITRY, WHENEVER THE XRT79L71
HAS BEEN CONFIGURED TO OPERATE IN THE E3, ITU-T G.832 CLEAR-CHANNEL FRAMER MODE (WITH THE "TRANSMIT PAYLOAD
DATA INPUT INTERFACE' BLOCK HIGHLIGHTED)............................................................................................................... 433
TABLE 56: LIST AND DESCRIPTION OF THE PINS ASSOCIATED WITH THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK ......... 434
TABLE 57: A SUMMARY OF THE "TRANSMIT PAYLOAD DATA INPUT INTERFACE" MODES ................................................................. 437
6.2.1.1 MODE 1 - SERIAL/LOOP-TIMING MODE OPERATION OF THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK . 437
FIGURE 206. AN ILLUSTRATION OF HOW TO INTERFACE THE "SYSTEM-SIDE" TERMINAL EQUIPMENT TO THE "TRANSMIT PAYLOAD DATA IN-
PUT INTERFACE" BLOCK (OF THE XRT79L71) FOR MODE 1 (SERIAL/LOOP-TIMING) OPERATION ..................................... 438
FIGURE 207. AN ILLUSTRATION OF THE BEHAVIOR OF THE "SYSTEM-SIDE TERMINAL EQUIPMENT" SIGNALS FOR MODE 1 (SERIAL/LOOP-
TIMING) MODE OPERATION ........................................................................................................................................... 439
6.2.1.2 MODE 2 - SERIAL/LOCAL-TIMING/FRAME SLAVE MODE OPERATION OF THE TRANSMIT PAYLOAD DATA INPUT INTERFACE
BLOCK ................................................................................................................................................................... 440
FIGURE 208. AN ILLUSTRATION OF HOW TO INTERFACE THE "SYSTEM-SIDE TERMINAL EQUIPMENT" SIGNALS FOR MODE 2 (SERIAL/LOCAL-
TIMING/FRAME SLAVE) MODE OPERATION ..................................................................................................................... 440
FIGURE 209. ILLUSTRATION OF THE BEHAVIOR OF THE "SYSTEM-SIDE TERMINAL EQUIPMENT/TRANSMIT PAYLOAD DATA INPUT INTERFACE"
SIGNALS FOR MODE 2 OPERATION. ............................................................................................................................... 442
6.2.1.3 MODE 3 - SERIAL/LOCAL-TIMING/FRAME MASTER MODE OPERATION OF THE TRANSMIT PAYLOAD DATA INPUT INTERFACE
BLOCK ................................................................................................................................................................... 442
FIGURE 210. AN ILLUSTRATION AS TO HOW SHOULD INTERFACE THE "SYSTEM-SIDE TERMINAL EQUIPMENT" SIGNALS FOR MODE 3 (SERIAL/
LOCAL-TIMING/FRAME-SLAVE) MODE OPERATION.......................................................................................................... 443
FIGURE 211. AN ILLUSTRATION OF THE BEHAVIOR OF THE "SYSTEM-SIDE TERMINAL EQUIPMENT" SIGNALS FOR MODE 3 (SERIAL/LOCAL-
TIMING/FRAME-MASTER) MODE OPERATION.................................................................................................................. 444
6.2.1.4 MODE 4 - NIBBLE-PARALLEL/LOOP-TIMING MODE OPERATION OF THE TRANSMIT PAYLOAD DATA INPUT INTERFACE
XII
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