XRT83SH38ES View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT83SH38ES' PDF : 78 Pages View PDF
XRT83SH38
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.7
6.0 MICROPROCESSOR INTERFACE
The microprocessor interface can be accessed through a standard serial interface (BGA Package Only) or a
standard parallel microprocessor interface. The SER_PAR pin is used to select between the two. By default,
the chip is configured in the Parallel Microprocessor interace. For Serial communication, this pin must be
pulled “High”.
6.1 Serial Microprocessor Interface Block
The serial microprocessor uses a standard 3-pin serial port with CS, SCLK, and SDI for programming the LIU.
Optional pins such as SDO, INT, and RESET allow the ability to read back contents of the registers, monitor
the LIU via an interrupt pin, and reset the LIU to its default configuration by pulling reset "Low" for more than
10µS. A simplified block diagram of the Serial Microprocessor is shown in Figure 32.
FIGURE 32. SIMPLIFIED BLOCK DIAGRAM OF THE SERIAL MICROPROCESSOR INTERFACE
CS
SCLK
SDO
INT
SDI
Serial
Microprocessor
Interface
SER_PAR
HW/Host
RESET
6.1.1 Serial Timing Information
The serial port requires 24 bits of data applied to the SDI (Serial Data Input) pin. The Serial Microprocessor
samples SDI on the rising edge of SCLK (Serial Clock Input). The data is not latched into the device until all 24
bits of serial data have been sampled. A timing diagram of the Serial Microprocessor is shown in Figure 33.
FIGURE 33. TIMING DIAGRAM FOR THE SERIAL MICROPROCESSOR INTERFACE
CS
SDI
SDO
SCLK
8-Bit Address
ADDR[0] - ADDR[7]
R/W 7-Bit Don't Care
1=Read
0=Write
Don't Care
8-Bit Data
DATA[0] - DATA[7]
Readback
DATA[0] - DATA[7]
NOTE: For applications without a free running SCLK, a minimum of 1 SCLK pulse must be applied when CS is “High”,
befrore pulling CS “Low”.
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