XRT83SL28ES View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT83SL28ES' PDF : 47 Pages View PDF
XRT83SL28
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
xr
REV. 1.0.0
1.7 HDB3 Decoder
In single rail mode, RPOS is the output of decoded AMI or HDB3 signals and RNEG is the LCV output. HDB3
data is defined as any block of 4 successive zeros replaced with OOOV or BOOV, so that two successive V
pulses are of opposite polarity to acheive zero DC offsey. If the HDB3 decoder is selected, the receive path
removes the V and B pulses so that the original data is output to RPOS.
1.8 ARAOS (Automatic Receive All Ones)
The XRT83SL28 has the ability to send an All Ones signal to RPOS if ARAOS is enabled in the appropriate
channel register. If ARAOS is enabled and an RLOS condition occurs, the Receiver outputs will generate a
single rail All Ones pattern. When RLOS clears, the All Ones pattern ends and the Receive path returns to
normal operation. For TAOS in the transmit direction, see the Transmit Section of this datasheet. A simplified
block diagram of the ATAOS function is shown in Figure 9.
FIGURE 9. SIMPLIFIED BLOCK DIAGRAM OF THE ARAOS FUNCTION
RPOS
RNEG
Rx
TAOS
ARAOS
RLOS
1.9 RPOS/RNEG/RCLK
The digital output data can be programmed to either single rail or dual rail formats. Figure 10 is a timing
diagram of a repeating "0011" pattern in single-rail mode. Figure 11 is a timing diagram of the same fixed
pattern in dual rail mode.
FIGURE 10. SINGLE RAIL MODE WITH A FIXED REPEATING "0011" PATTERN
RCLK
RPOS
0
0
1
1
0
18
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