XRT83SL28ES View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT83SL28ES' PDF : 47 Pages View PDF
XRT83SL28
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
TABLE 8: MICROPROCESSOR REGISTER 0X01H BIT DESCRIPTION
xr
REV. 1.0.0
REVISION "ID" REGISTER (0X01H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Revision The revision "ID" of the XRT83SL28 LIU is used to enable software
RO
0
D6
"ID" to identify which revision of silicon is currently being tested. The
0
D5
revision "ID" for the first revision of silicon (Revision A) will be
0
0x01h.
D4
0
D3
0
D2
0
D1
0
D0
1
TABLE 9: MICROPROCESSOR REGISTER 0X02H BIT DESCRIPTION
DEVICE "ID" REGISTER (0X02H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Device "ID" The device "ID" of the XRT83SL28 LIU is 0xF7h. Along with the
RO
1
D6
revision "ID", the device "ID" is used to enable software to identify
1
D5
the silicon adding flexibility for system control and debug.
1
D4
1
D3
0
D2
1
D1
1
D0
1
TABLE 10: MICROPROCESSOR REGISTER BIT DESCRIPTION
CHANNEL CONTROL REGISTER (0X04H, 0X08H, 0X0CH, 0X10H, 0X14H, 0X18H, 0X1CH, 0X20H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved This Register Bit is Not Used
X
X
D6
RLAM_n RLOS/AIS Mode Select
R/W
0
This bit is used to select the industry standard for declaring / clear-
ing RLOS and AIS functionality. See the Receive Path Line Inter-
face section of this datasheet.
"0" = ITU G.775
"1" = ETSI300233
36
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