XRT83SL34 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT83SL34' PDF : 80 Pages View PDF
XRT83SL34
QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
REV. P1.0.8
TABLE 49: ASYNCHRONOUS MODE 1 - INTEL 8051 AND 80188 INTERFACE TIMING
SYMBOL
PARAMETER
MIN
MAX
t0
Valid Address to CS Falling Edge
t1
CS Falling Edge to RD Assert
t2
RD Assert to RDY Assert
NA
RD Pulse Width (t2)
0
-
65
-
-
50
50
-
t3
CS Falling Edge to WR Assert
t4
WR Assert to RDY Assert
NA
WR Pulse Width (t2)
65
-
-
50
50
-
t5
CS Falling Edge to AS Falling Edge
0
-
Reset pulse width - both Motorola and Intel Operations (see Figure 30)
t9
Reset pulse width
30
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
74
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