XRT91L80
PRELIMINARY
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
LVDS LOGIC SIGNAL DC ELECTRICAL CHARACTERISTICS
Test Condition: VDD1.8 = 1.8V + 5%, VDD_IO = 3.3V + 5% unless otherwise specified
SYMBOL
TYPE
PARAMETER
MIN
TYP
MAX
VOH
LVDS Output High Voltage
1480
VOL
LVDS Output Low Voltage
1020
VODIFF LVDS Output Differential Voltage
250
400
Swing
VOSINGLE LVDS Output Single-Ended Voltage
125
200
Swing
VIH
LVDS Input High Voltage
1400
VIL
LVDS Input Low Voltage
800
VIDIFF
LVDS Input Differential Voltage
200
Swing
VISINGLE LVDS Input Single-Ended Voltage
100
Swing
xr
REV. P1.1.0
UNITS CONDITIONS
mV 100 Ω line - line
mV 100 Ω line - line
mV 100 Ω line - line
mV 100 Ω line - line
mV
mV
mV
mV
LVTTL/LVCMOS SIGNAL DC ELECTRICAL CHARACTERISTICS
Test Condition: VDD1.8 = 1.8V + 5%, VDD_IO = 3.3V + 5% unless otherwise specified
SYMBOL
TYPE
PARAMETER
MIN
TYP
MAX
VOH LVCMOS Output High Voltage
2.4
VOL LVCMOS Output Low Voltage
0.4
VIH
LVTTL/ Input High Voltage
2.0
LVCMOS
VIL
LVTTL/ Input Low Voltage
0.8
LVCMOS
ILEAK
LVTTL/ Input Leakage Current
-10
10
LVCMOS
ILEAK_PU LVTTL/ Input Leakage Current with
38
52
65
LVCMOS Pull-Up Resistor
ILEAK_PD LVTTL/ Input Leakage Current with
32
43
55
LVCMOS Pull-Down Resistor
UNITS
V
V
V
CONDITIONS
IOH = -1.0mA
IOH = 1.0mA
V
µA VIN = VDD_IO
or VIN = 0
µA
VIN = 0
µA VIN = VDD_IO
NOTE: All input control pins are LVCMOS and LVTTL compatible. All output control pins are LVCMOS compatible only.
40