Z51F0410HCX View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z51F0410HCX' PDF : 184 Pages View PDF
Z51F0410
Product Specification
4.2 BIT
4.2.1 Overview
The Z51F0410 MCU features one 8-bit Basic Interval Timer that is free-run and can’t stop. Block
diagram is shown in Figure 4.2. In addition, the Basic Interval Timer generates the time base for
watchdog timer counting. It also provides a Basic interval timer interrupt (BITF).
The Z51F0410 MCU has these Basic Interval Timer (BIT) features:
- During Power On, BIT gives a stable clock generation time
- On exiting Stop mode, BIT gives a stable clock generation time
- As clock function, time interrupt occurrence
4.2.2 Block Diagram
Internal Ring-
OSC (128KHz/
±50%)
DIV
BITR
(8-BIT
COUNTER)
& BITR[7:0]
& BITR[6:0]
& BITR[5:0]
& BITR[4:0]
& BITR[3:0]
& BITR[2:0]
& BITR[1:0]
& BITR[0]
BITR[7]
BITR[6]
BITR[5]
BITR[4]
BITR[3]
BITR[2]
BITR[1]
BITR[0]
BCK[2:0]
BIT Interrupt
BIT_OUT
(WDT clock source)
4.2.3 Register Map
Name
BCCR
BITR
Address
8BH
8CH
Figure 4.2 BIT Block Diagram
Table 4.2 BIT Register Map
Dir
R/W
R
Default
05H
00H
Description
BIT Clock Control Register
Basic Interval Timer Register
PS029502-0212
PRELIMINARY
72
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