Z86M1720ASC View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z86M1720ASC' PDF : 138 Pages View PDF
Z86017/Z16017 PCMCIA Interface Solution
Product Specification
71
Table 54. Interface Configuration Register 4: Address 2Ch (Continued)
Bit Placement Bit Name
Bit 7
EN_PULSE
Description
When set, this bit enables auto busy status when the host
sets reset. The busy status remains present until the internal
time-out or when using a µP and the µP clears the busy
status. When cleared, this bit disables auto busy on host
resets. The pulse time for busy is 2(15)/PC_MCLK (MHz)
= SEL.
Table 55. Power Management Clock Select
Timer/Count
Bit 2 Bit 1 Bit 0 6.7 sec./count
0 0 1 6.4 µsec./count
0 1 0 Disable counter
0 1 1 12.8 µsec./count
1 0 0 100 nsec./count
1 0 1 6.4 µsec./count
1 1 0 6.4 µsec./count
Input Clock PC_MCLK
@ 20 MHz
@ 20 MHz
@ 20 MHz
@ 20 MHz
@ 20 MHz
@ 20 MHz
Programming Internal Registers
PS012002-1201
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