2ED2109 (4) S06F (J)
650 V half bridge gate driver with integrated bootstrap diode
Figure 10 shows the linear relationship between the resistor (RDT) and dead time. Based on the end application,
designers can choose to add the external resistor to increase the dead time. In case the DT pin is left open, the
gate driver enters protection mode switching off the output stages. Hence this pin has to be connected to VSS
pin with a 0 Ω to 200 kΩ resistor based on application requirements. A 0 Ω (or shorted) provides a minimum
deadtime of 540 ns and 200 kΩ ohm provides a maximum deadtime of 5 us.
Programmable dead time in 2ED21094S06J
6
5
4
3
2
1
0
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200
RDT (kΩ)
Figure 10 Variation of dead time vs. external resistor (RDT)
5.4
Matched propagation delays
The 2ED2109 (4) S06F (J) is designed with propagation delay matching circuitry. With this feature, the IC’s
response at the output to a signal at the input requires approximately the same time duration (i.e., tON, tOFF) for
both the low-side channels and the high-side channels; the maximum difference is specified by the delay
matching parameter (MT). The propagation turn-on delay (tON) of the 2ED2109 (4) S06F (J) is matched to the
propagation turn-off delay (tOFF).
Figure 11 Deadtime matching waveform definition
Datasheet
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2020-07-02