A3985
Digitally Programmable
Dual Full-Bridge MOSFET Driver
LD Package, 38-Pin TSSOP
9.8 .386
9.6 .378
38
A
12
38X
0.10 [.004] C
38X
0.27
0.17
.011
.007
0.08 [.003] M C A B
1.85 .073
NOM
0.30 .012
NOM
38
0.50 .020
36X 0.20 .008
MIN
B
A
B
4.5 .177
4.3 .169
6.6 .260
6.2 .244
8º
0º
0.20 .008
0.09 .004
0.75 .030
0.45 .018
1 .039
REF
C
SEATING
PLANE
1.20 .047
MAX
0.15 .006
0.00 .000
0.25 .010
SEATING PLANE
GAUGE PLANE
0.50 .020
NOM
5.9 .232
NOM
Preliminary dimensions, for reference only
(reference JEDEC MO-153 BD-1)
Dimensions in millimeters
U.S. Customary dimensions (in.) in brackets, for reference only
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Reference land pattern layout (reference IPC7351
TSSOP50P640X120-38M); adjust as necessary to meet
application process requirements and PCB layout tolerances
12
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be
required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is
cautioned to verify that the information being relied upon is current.
Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility
for its use; nor for any infringement of patents or other rights of third parties which may result from its use.
Copyright©2005, 2006 AllegroMicrosystems, Inc.
Allegro MicroSystems, Inc.
15
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com