A4980LP View Datasheet(PDF) - Allegro MicroSystems
Part Name
Description
MFG CO.
'A4980LP' PDF : 44 Pages View PDF
A4980
Automotive, Programmable Stepper Driver
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CONFIG 1
OSC TSC1 TSC0
0
1
CD3 CD2 CD1 CD0 DIAG1 DIAG0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
RUN
EN OL1 OL0 HLR SLEW BRK DCY1 DCY0 SC5 SC4 SC3 SC2 SC1 SC0
1
0
0
0
1
0
1
0
0
1
0
0
0
0
0
0
Configuration Register 1
OSC Selects clock source
OSC Clock Source
0 Internal
1 External
Default
D
Overcurrent fault delay
TSC[1..0] Assumes 4-MHz clock
TSC1 TSC0 Detect Delay Time
0
0
0
1
1
0
1
1
0.5 μs
1 μs
2 μs
3 μs
Default
D
PWM count difference for ST detection
CD[3..0] Default to 8
DIAG[1..0] Selects signal routed to DIAG output
DIAG1 DIAG0 Signal on DIAG Pin
Default
0
0 Fault–low true
D
0
1 ST–low true
1
0 PWM-on, Phase A
1
1 Temperature
Run Register
Phase current enable
EN
OR with ENABLE pin
EN Phase Current Enable
0
Output bridges disabled if ENABLE
pin = 0
1 Output bridges enabled
Default
D
OL[1..0]
OL1
0
0
1
1
Open load current threshold as a percentage of
maximum current defined by ISMAX and MXI[1..0]
OL0 Open Load Current
Default
0
20%
1
30%
D
0
40%
1
50%
HLR
HLR
0
1
Selects slow decay and brake recirculation path
Recirculation Path
Default
High side
D
Low side
SLEW
SLEW
0
1
Slew rate control
Slew Rate Control
Disable
Enable
Default
D
BRK
BRK
0
1
Brake enable
Brake
Normal operation
Brake active
Default
D
DCY[1..0] Decay mode selection
DCY1 DCY0 Decay Mode
0
0
0
1
1
0
1
1
Slow
Mixed—PFD fixed
Mixed—PFD auto
Fast
Default
D
SC[5..0]
Step change number
2’s complement format
Positive value increases Step Angle Number
Negative value decreases Step Angle Number
Allegro MicroSystems, Inc.
20
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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