A6902D View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
A6902D
STMicroelectronics
'A6902D' PDF : 33 Pages View PDF
A6902D
LC filter
7.2
7.2.1
7.2.2
(6)
FP2
=
2πRC
1
C0 +
CP
whereas the zero is defined as:
(7)
FZ1
=
1
2πRCCC
FP1 is the low frequency pole which sets the bandwidth, while the zero FZ1 is usually put near to the frequency of
the double pole of the L-C filter (see below). FP2 is usually at a very high frequency.
LC filter
The L-C filter has different contributions depending on the active loop so the design of the compensation network
must guarantee a proper bandwidth / phase margin for both operations.
Voltage loop
The transfer function of the power stage is given by:
(8)
1
GPWR_VM s
=
s
∙ LIND +
1
RLOAD
+
RES
+
1
s∙
1
COUT
RDC + RSENSE +
1
RLOAD
+
1
RES
+
1
1
s ∙ COUT
∙
R1
R1 + R2
R1, R2 represents the output voltage divider.
The previous equation can be rewritten and simplified, assuming RES and RDC negligible compared to RLOAD:
(9)
GPWR_VM s
=
GLC0
1
+
1+
2π ∙
s
2π ∙ FZ_ESR_VM
s
Q∙
FLC
+
s
2π ∙ FLC
2
∙
R1
R1 + R2
GLC0
=
RLOAD
RLOAD + RDC + RSENSE
≅
1
FZ_ESR_VM
=
1
2πRESCOUT
FP_LC =
2π LIND ∙ COUT ∙
1
RLOAD + RES
≈
2π
1
LIND ∙ COUT
RLOAD + RDC + RSENSE
Q
≈
LIND ∙ COUT
LIND
RLOAD
+
COUT
∙
RSENSE
The singularity introduced by the ESR of the output capacitor, FZ_ESR_VM, is essential to increase the phase
margin of the loop.
Constant current loop
The transfer function of the output filter is given by:
(10)
DS5503 - Rev 6
page 14/33
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