A6902D View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
A6902D
STMicroelectronics
'A6902D' PDF : 33 Pages View PDF
VIN
C1
GND
A6902D
Layout considerations
Figure 11. Low-side current sensing implementation
6 VREF
OUT 1
8 VCC
CS+ 2
A6902D CS- 3
4 COMP GND
FB 5
C4
7
C3
R3
L1
R1
D1
R2
VLOAD+
VLOAD-
C5
Rsns
8.6
Here the current error amplifier inputs are biased at the device ground so the duty cycle limitation is no more
present. The device can manage 100% duty cycle thanks to the P-CHANNEL embedded power element.
This solution is feasible if the load can be left floating (i.e. no more strictly referred to GND).
Layout considerations
The layout of switching DC-DC converters is very important to minimize noise and interference. Power-generating
portions of the layout are the main cause of noise and so high switching current loop areas should be kept as
small as possible and lead lengths as short as possible.
High impedance paths (in particular the feedback connections) are susceptible to interference, so they should be
routed as far as possible from the high current paths. A layout example is provided in figure below.
Figure 12. Layout example
Compensation network
far from high current paths
Minimum size of feedback
pin connections to avoid
pickup
Very small high current
circulating path to minimize
radiation and high frequency
resonance problems
RCC
R1
5
4
R2
VIN
6 A6902D 3
7
2
8
1
Cin
D
Connection to
ground plane
through VIAs
Extended ground
plane on the
bottom side
L
RSNS
VOUT
Cout
GND
Output capacitor
directly connected
to heavy ground
The input and output loops are minimized to avoid radiation and high frequency resonance problems. The
feedback pin connections to the external divider are very close to the device to avoid pick-up noise. Another
DS5503 - Rev 6
page 19/33
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