8
Application information
A6902D
Application information
8.1
Input capacitor selection
The input capacitor must be able to support the maximum input operating voltage and the maximum RMS input
current.
Since step-down converters draw current from the input in pulses, the input current is squared and the height of
each pulse is equal to the output current. The input capacitor has to absorb all this switching current. For this
reason, the quality of these capacitors has to be very high to minimize the power dissipation generated by the
internal ESR, thereby improving system reliability and efficiency. The input capacitor critical parameter is usually
the RMS current rating, which must be higher than the RMS input current. The RMS input current (flowing through
the input capacitor) is estimated by:
(13)
ICIN, RMS ≅ IOUT ∙ D ∙ 1 − D
The maximum input RMS current is achieved when D = 50%.
Based on above requirements of current rating and low ESR, a typical choice is a ceramic capacitor 50 V rated, in
the range of 4.7 to 10 µF.
Alternative solutions, like low ESR aluminum or polymer capacitors, can also fit if the above requirements are
satisfied.
High dv/dt voltage spikes on the input side can be critical for DC/DC converters. A good power layout and input
voltage filtering help to minimize this issue.
In addition to the above considerations, a 1 μF/50 V ceramic capacitor as close as possible to the VCC and GND
pins is always suggested to adequately filter VCC spikes.
The amount of input voltage ripple can be roughly estimated by:
(14)
VIN, PP
≅
IOUT ∙
D∙ 1−D
CIN ∙ FSW
+ IOUT ∙ RES
In case of MLCC ceramic input capacitors, the equivalent series resistance (RES) is almost negligible.
8.2
Output capacitor selection
The output capacitor is very important in order to satisfy the output voltage ripple requirement. Using a small
inductor value is useful to reduce the size of the choke but increases the current ripple. So, to reduce the output
voltage ripple, a low ESR capacitor is required. Nevertheless, the ESR of the output capacitor introduces a zero in
the open loop gain, which helps to increase the phase margin of the system.
The current in the output capacitor has a triangular waveform which generates a voltage ripple across it. This
ripple is due to the capacitive component (charge and discharge of the output capacitor) and the resistive
component (due to the voltage drop across its ESR). So the output capacitor must be selected in order to meet
the voltage ripple requirements.
The amount of the voltage ripple can be estimated starting from the current ripple obtained by the inductor
selection. Assuming ΔIL the inductor current ripple, the output voltage ripple is roughly estimated by:
(15)
∆ VOUT, PP
≅
∆ IL ∙
1
8 ∙ FSW ∙ COUT
+
∆ IL ∙ RES, OUT
Usually the resistive component of the ripple is much higher than the capacitive one, if the output capacitor
adopted is not a multi-layer ceramic capacitor (MLCC) with very low ESR value.
The output capacitor is important also for loop stability: it fixes the double LC filter pole and, above all, the zero
due to its ESR.
This component must be selected considering all the above requirements.
DS5503 - Rev 6
page 16/33