A8510 View Datasheet(PDF) - Allegro MicroSystems
Part Name
Description
MFG CO.
'A8510' PDF : 33 Pages View PDF
A8510
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
Soft start function
During soft start the LEDx pins are set to sink (ILEDSS) and the
boost switch current is reduced to the ISWSS(LIM) level to limit
the inrush current generated by charging the output capacitors.
When the converter senses that there is enough voltage on the
LEDx pins, the converter proceeds to increase the LED current
to the preset regulation current and the boost switch current limit
is switched to the ISW(LIM) level to allow the A8510 to deliver the
necessary output power to the LEDs. This is shown in figure 7.
Frequency selection
The switching frequency on the boost regulator is set by the
resistor connected to the FSET/SYNC pin, and the switching
frequency can be can be anywhere from 580 kHz to 2.3 MHz.
Figure 6 shows the typical switching frequencies for given resis-
tor values.
If during operation a fault occurs that will increase the switch-
ing frequency, the FSET/SYNC pin is clamped to a maximum
switching frequency of no more than 3.5 MHz.
Synchronization
The A8510 can also be synchronized using an external clock on
the FSET/SYNC pin. Figure 8 shows the correspondence of a
SYNC signal and the SW pin, and figure 9 shows the result when
a SYNC signal is detected: the LED current does not show any
variation while the frequency synchronization occurs. At power-
up if the FSET/SYNC pin is held low, the IC will not power-up.
Only when the FSET/SYNC pin is tri-stated to allow for the pin
to rise, to about 1 V, or when a sync clock is detected, will the
A8510 try to power-up.
Inrush current caused by
enabling the disconnect
switch (when used)
Normal operation
ISW(lim)
C1
IOUT
IIN
C2
Operation during
ISWSS(lim)
VOUT
C3
C4
EN/PWM
t
Figure 7. Startup diagram showing the input current, output voltage, and
output current, fSW = 800 kHz; shows IOUT (ch1, 500 mA/div.), IIN (ch2, 1 A/
div.), VOUT (ch3, 20 V/div.), and EN/PWM (ch4, 5 V/div.), t = 1 ms/div.
VOUT
C1
ILED
C2
C3
FSET/SYNC
SW node
C4
t
Figure 8. Diagram showing a synchronized FSET/SYNC pin and switch
node; shows VOUT (ch1, 20 V/div.), ILED (ch2, 200 mA/div.), FSET/SYNC
(ch3, 2 V/div.), and SW node (ch4, 20 V/div.), t = 2 μs/div.
VOUT
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
10.0 12.5 15.0 17.5 20.0 22.5 25.0 30.0 32.5 35.0
Resistance for RSET (kΩ)
Figure 6. Typical Switching Frequency versus value of RFSET resistor.
C1
C2
C3
800 kHz operation
IOUT
FSET/SYNC
SW node
1.5 MHz operation
C4
t
Figure 9. Transition of the SW waveform when the SYNC pulse is
detected. The A8510 switching at 800 kHz, applied SYNC pulse at
1.5 MHz; shows VOUT (ch1, 20 V/div.), IOUT (ch2, 500 mA/div.), FSET/
SYNC (ch3, 2 V/div.), and SW node (ch4, 20 V/div.), t = 2 μs/div.
Allegro MicroSystems, Inc.
12
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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