A8510 View Datasheet(PDF) - Allegro MicroSystems
Part Name
Description
MFG CO.
'A8510' PDF : 33 Pages View PDF
A8510
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
Figure 22 displays a typical OVP event caused by an open LED
string. After the OVP condition is detected, the boost stops
switching, and the open LED string is removed from operation.
Afterwards VOUT is allowed to fall, and eventually the boost will
resume switching and the A8510 will resume normal operation.
A8510 also has built-in secondary overvoltage protection to pro-
tect the internal switch in the event of an open diode condition.
Open Schottky diode (D1) detection is implemented by detecting
overvoltage on the SW pins of the device. If voltage on the SW
pins exceeds the device safe operating voltage rating, the A8510
disables and remains latched. To clear this fault, the IC must be
shut down either by using the PWM signal or by going below the
UVLO threshold on the VIN pin. Figure 23 illustrates this. As
soon as the switch node voltage (SW) exceeds VOVP(sec), the IC
shuts down. Due to small delays in the detection circuit, as well
as there being no load present, the switch node voltage will rise
above the trip point voltage.
Figure 24 illustrates when the A8510 is being enabled during an
open diode condition. The IC goes through all of its initial LED
detection and then tries to enable the boost, at which point the
open diode is detected.
Output disconnect
event detected
VOUT
VOUT
SW node
LED string open
condition detected
SW node
C2
C2
C1
EN/PWM
C1
EN/PWM
C3
C3
ILED
ILED
C4
t
Figure 21. OVP protection in an output disconnect from load event; shows
VOUT (ch1, 10 V/div.), SW node (ch2, 20 V/div.), EN/PWM (ch3, 5 V/div.),
and ILED (ch4, 50 mA/div.), t = 2 ms/div.
C4
t
Figure 22. OVP protection in an open LED string event; shows VOUT
(ch1, 10 V/div.), SW node (ch2, 20 V/div.), EN/PWM (ch3, 5 V/div.), and
ILED (ch4, 200 mA/div.), t = 1 ms/div.
EN/PWM
Open diode
condition detected
C1
C2
Open diode
condition detected
C3
SW node
IOUT
FAULT
EN/PWM
C4
t
Figure 23. OVP protection in an open Schottky diode D1 event, while the
IC is in normal operation; shows SW node (ch1, 50 V/div.), IOUT (ch2, 500
mA/div.), ¯F¯¯A¯U¯¯L¯¯T¯ (ch3, 5 V/div.), and EN/PWM (ch4, 5 V/div.), t = 2 μs/div.
C1
SW node
C2
VOUT
C3
ILED
C4
t
Figure 24. OVP protection when the IC is enabled during an open diode
condition; shows EN/PWM (ch1, 5 V/div.), SW node (ch2, 50 V/div.), VOUT
(ch3, 10 V/div.), and ILED (ch4, 200 mA/div.), t = 500 μs/div.
Allegro MicroSystems, Inc.
18
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Share Link: 
