A8510 View Datasheet(PDF) - Allegro MicroSystems
Part Name
Description
MFG CO.
'A8510' PDF : 33 Pages View PDF
A8510
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
appropriate value. In cases where the user-supplied APWM has
significant duty cycle limitations, it might be preferable to set the
maximum ISET current to be 25% to 50% higher, thus allowing
the APWM signal to have duty cycles that are between 50% and
75%.
Although the APWM dimming function has a wide frequency
range, if this function is used strictly as an analog dimming
function it is recommended to use frequency ranges between
50 and 500 kHz for best accuracy. The frequency range must be
considered only if the user is not using this function as a closed
loop trim function. There is a few millisecond propagation delay
between the APWM signal and ILED current. This effect is shown
in figures 16 through 18.
Analog dimming
The A8510 can also be dimmed by using an external DAC or
another voltage source applied either directly to the ground side
of the RISET resistor or through an external resistor to the ISET
pin (see figure 19).
• For a single resistor (upper panel of figure 19), the ISET current
is controlled by the following formula:
ISET
=
VISET – VDAC
RISET – VDAC
(3)
Where VISET is the ISET pin voltage and VDAC is the DAC out-
put voltage.
When the DAC voltage is equal to VISET , the internal reference,
there is no current through RISET . When the DAC voltage starts
to decrease, the ISET current starts to increase, thus increasing
the LED current. When the DAC voltage is 0 V, the LED current
will be at its maximum.
• For a dual-resistor configuration (lower panel of figure 19), the
ISET current is controlled by the following formula:
ISET
=
VISET
RISET
–
VDAC – VISET
R1
(4)
The advantage of this circuit is that the DAC voltage can be
higher or lower, thus adjusting the LED current to a higher or
lower value of the preset LED current set by the RISET resistor:
▫ VDAC = 1.003 V; the output is strictly controlled by RISET
▫ VDAC > 1.003 V; the LED current is reduced
▫ VDAC < 1.003 V; the LED current is increased
EN/PWM
C1
DAC
VDAC
GND
RISET
A8510
ISET
GND
APWM
C2
IOUT
C3
t
DAC
VDAC
GND
R1
RISET
A8510
ISET
GND
Figure 18. Transition of output current level when a 50% duty cycle signal
is applied to the APWM pin, in conjunction with a 50% duty cycle PWM
dimming being applied to the EN/PWM pin; shows EN/PWM (ch1, 5 V/
div.), APWM (ch2, 5 V/div.), and ILED (ch3, 20 mA/div.), t = 1 ms/div.
Figure 19. Simplified diagrams of voltage control of ILED: typical
applications using a DAC to control ILED using a single resistor (upper),
and dual resistors (lower).
Allegro MicroSystems, Inc.
16
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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