AC206
Preliminary Data Sheet
07/08/02
PHY INTERRUPT CONTROL/STATUS REGISTER
Table 31: PHY Interrupt Control/Status Register
Register
Bit
Name
17.15
Jabber_IE
17.14
17.13
Rx_Er_IE
Page_Rx_IE
17.12
PD_Fault_IE
17.11
17.10
LP_Ack_IE
Link_Schange_ IE
17.9
R_Fault_IE
17.8
Aneg_Comp_IE
17.7
Jabber_Int
17.6
Rx_Er_Int
17.5
Page_Rx_Int
17.4
PD_Fault_Int
17.3
LP_Ack_Int
17.2
Link_Schanged Int
17.1
R_Fault_Int
17.0
A_Neg_Comp Int
Description
Jabber Interrupt Enable.
Receive Error Interrupt Enable.
Page Received Interrupt Enable.
Parallel Detection Fault Interrupt Enable.
Link Partner Acknowledge Interrupt Enable.
Link Status Changed Interrupt Enable.
Remote Fault Interrupt Enable.
Auto-Neg Complete Interrupt Enable.
This bit is set when a jabber event is detected.
This bit is set when RX_ER transitions high.
This bit is set when a new page is received from link partner during
Auto-Negotiation.
This bit is set when parallel detect fault is detected.
This bit is set when the FLP with acknowledge bit set is received.
This bit is set when link status is changed.
This bit is set when remote fault is detected.
This bit is set when Auto-Neg is completed.
Mode Default
RW 0
RW 0
RW 0
RW 0
RW 0
RW 0
RW 0
RW 0
RC 0
RC 0
RC 0
RC 0
RC 0
RC 0
RC 0
RC 0
Page 28 PHY Registers
Broadcom
Document AC206-DS05-405-R