ACS8525AP View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'ACS8525AP' PDF : 112 Pages View PDF
ACS8525A LC/P
ADVANCED COMMS & SENSING
FINAL
Figure 10 Read Access Timing for SERIAL Interface
DATASHEET
CSB
SCLK
SDI
SDO
CSB
SCLK
CLKE = 0; SDO data is clocked out on the rising edge of SCLK
tsu2
tpw2
th2
tsu1
th1 tpw1
_
R/W A0 A1 A2 A3 A4 A5 A6
Output not driven, pulled low by internal resistor
td1
td2
D0 D1 D2 D3 D4 D5 D6 D7
CLKE = 1; SDO data is clocked out on the falling edge of SCLK
th2
SDI
SDO
_
R/W A0 A1 A2 A3 A4 A5 A6
td1
td2
Output not driven, pulled low by internal resistor
D0 D1 D2 D3 D4 D5 D6 D7
F8526D_013ReadAccSerial_01
Table 13 Read Access Timing for SERIAL Interface (For use with Figure 10)
Symbol
Parameter
MIN
TYP
MAX
tSU1
Setup SDI valid to SCLKrising edge
4 ns
-
-
tSU2
Setup CSBfalling edge to SCLKrising edge
14 ns
-
-
td1
Delay SCLKrising edge (SCLKfalling edge for CLKE = 1) to SDO valid
-
-
18 ns
td2
Delay CSBrising edge to SDO high-Z
-
-
16 ns
tpw1
SCLK Low time
22 ns
-
-
tpw2
SCLK High time
22 ns
-
-
th1
Hold SDI valid after SCLKrising edge
6 ns
-
-
th2
Hold CSB Low after SCLKrising edge, for CLKE = 0
Hold CSB Low after SCLKfalling edge, for CLKE = 1
5 ns
-
-
tp
Time between consecutive accesses (CSBrising edge to CSBfalling edge)
10 ns
-
-
Revision 1.00/September 2007 © Semtech Corp.
Page 36
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