ACS8525A LC/P
ADVANCED COMMS & SENSING
Address (hex): 05
FINAL
DATASHEET
Register Name sts_interrupts
Description
(R/W) Bits [7:0] of the interrupt Default Value 1111 1111
status register.
Bit 7
Bit 6
Bit 5
status_SEC2_
DIFF
Bit 4
status_SEC1_
DIFF
Bit 3
status_SEC2_
TTL
Bit 2
status_SEC1_
TTL
Bit 1
Bit 0
Bit No.
Description
Bit Value Value Description
[7:6]
Not used.
-
-
5
status_SEC2_DIFF
Interrupt indicating that input SEC2 DIFF
has become valid (if it was invalid), or invalid (if it
was valid). Latched until reset by software writing a
1 to this bit.
0
Input SEC2 DIFF has not changed status (valid/
invalid).
1
Input SEC2 DIFF has changed status (valid/invalid).
Writing 1 resets the interrupt to 0.
4
status_SEC1_DIFF
Interrupt indicating that input SEC1 DIFF has
become valid (if it was invalid), or invalid (if it was
valid). Latched until reset by software writing a 1 to
this bit.
0
Input SEC1 DIFF has not changed status (valid/
1
invalid).
Input SEC1 DIFF has changed status (valid/invalid).
Writing 1 resets the interrupt to 0.
3
status_SEC2_TTL
0
Input SEC2 TTL has not changed status (valid/
Interrupt indicating that input SEC2 TTL has become
invalid).
valid (if it was invalid), or invalid (if it was valid).
1
Input SEC2 TTL has changed status (valid/invalid).
Latched until reset by software writing a 1 to this bit.
Writing 1 resets the interrupt to 0.
2
status_SEC1_TTL
0
Input SEC1 TTL has not changed status (valid/
Interrupt indicating that input SEC1 TTL has become
1
invalid).
valid (if it was invalid), or invalid (if it was valid).
Input SEC1 TTL has changed status (valid/invalid).
Latched until reset by software writing a 1 to this bit.
Writing 1 resets the interrupt to 0.
[1:0]
Not used.
-
-
Address (hex): 06
Register Name sts_interrupts
Description
(R/W) Bits [15:8] of the interrupt Default Value 0011 1111
status register.
Bit 7
operating_
mode
Bit 6
DPLL1_
main_ref_failed
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
status_SEC3
Bit No.
Description
Bit Value Value Description
7
operating_mode
Interrupt indicating that the operating mode has
changed. Latched until reset by software writing a 1
to this bit.
0
Operating mode has not changed.
1
Operating mode has changed.
Writing 1 resets the interrupt to 0.
Revision 1.00/September 2007 © Semtech Corp.
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