ACS8525T View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'ACS8525T' PDF : 112 Pages View PDF
ACS8525 LC/P
ADVANCED COMMUNICATIONS
Address (hex): 3A
Register Name cnfg_differential_output
FINAL
Description
(R/W) Configures the electrical
compatibility of the differential
output driver to be 3 V PECL or
3 V LVDS.
DATASHEET
Default Value 1100 0010
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Output O1_LVDS_PECL
Bit No.
Description
Bit Value Value Description
[7:2]
[1:0]
Not used.
Output O1_LVDS_PECL
Selection of the electrical compatibility of Output O1
between 3 V PECL and 3 V LVDS.
-
-
00
Output O1 disabled.
01
Output O1 3 V PECL compatible.
10
Output O1 3 V LVDS compatible.
11
Not used.
Address (hex): 3B
Register Name cnfg_auto_bw_sel
Description
(R/W) Register to select
Default Value
automatic BW selection for DPLL1
path.
1001 1000
Bit 7
auto_BW_sel
Bit 6
Bit 5
Bit 4
Bit 3
DPLL1_lim_int
Bit 2
Bit 1
Bit 0
Bit No.
Description
Bit Value Value Description
7
[6:4]
3
[2:0]
auto_BW_sel
Bit to select locked bandwidth (Reg. 67) or
acquisition bandwidth (Reg. 69) for DPLL1.
Not used.
DPLL1_lim_int
When set to 1 the integral path value of DPLL1 is
limited or frozen when DPLL1 reaches either min. or
max. frequency. This can be used to minimise
subsequent overshoot when the DPLL is pulling in.
Note that when this happens, the reported
frequency value, via current_DPLL_freq (Reg. 0C,
0D and 07) is also frozen.
Not used.
1
Automatically selects either locked or acquisition
bandwidth as appropriate.
0
Always selects locked bandwidth.
-
-
1
DPLL value frozen.
0
DPLL not frozen.
-
-
Revision 3.01/August 2005 © Semtech Corp.
Page 61
www.semtech.com
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