AD9910/PCBZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'AD9910/PCBZ' PDF : 60 Pages View PDF
AD9910
I/O Update Rate Register
Address 0x04, 4 bytes are assigned to this register. This register is effective without the need for an I/O update.
Table 21. Bit Descriptions for I/O Update Rate Register
Bit(s)
Descriptor
Explanation
31:0
I/O Update Rate
Ineffective unless CFR2<23> = 1. This 32-bit number controls the automatic I/O update
rate (see the Automatic I/O Update section for details). Default is 0xFFFFFFFF.
Frequency Tuning Word Register (FTW)
Address 0x07, 4 bytes are assigned to this register.
Table 22. Bit Descriptions for FTW Register
Bit(s)
Descriptor
31:0
Frequency Tuning Word
Explanation
32-bit frequency tuning word.
Phase Offset Word Register (POW)
Address 0x08, 2 bytes are assigned to this register.
Table 23. Bit Descriptions for POW Register
Bit(s)
Descriptor
15:0
Phase Offset Word
Explanation
16-bit phase offset word.
Amplitude Scale Factor Register (ASF)
Address 0x09, 4 bytes are assigned to this register.
Table 24. Bit Descriptions for ASF Register
Bit(s)
Descriptor
31:16
Amplitude Ramp Rate
15:2
Amplitude Scale Factor
1:0
Amplitude Step Size
Explanation
16-bit amplitude ramp rate value. Effective only if CFR1<9:8> = 112; see the Output Shift
Keying (OSK) section for details.
14-bit amplitude scale factor.
Effective only if CFR1<9:8> = 112; see the Output Shift Keying (OSK) section for details.
Rev. 0 | Page 57 of 60
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