AD9910/PCBZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'AD9910/PCBZ' PDF : 60 Pages View PDF
AD9910
Parameter
201.1 MHz Analog Output
301.1 MHz Analog Output
401.3 MHz Analog Output
SERIAL PORT TIMING CHARACTERISTICS
Maximum SCLK Frequency
Minimum SCLK Clock Pulse Width
Maximum SCLK Rise/Fall Time
Minimum Data Setup Time to SCLK
Minimum Data Hold Time to SCLK
Maximum Data Valid Time in Read Mode
I/O_UPDATE/PS0/PS1/PS2 TIMING
CHARACTERISTICS
Minimum Pulse Width
Minimum Setup Time to SYNC_CLK
Minimum Hold Time to SYNC_CLK
Tx_ENABLE and 16-BIT PARALLEL (DATA) BUS
TIMING
Maximum PDCLK Frequency
Tx_ENABLE/Data Setup Time (to PDCLK)
Tx_ENABLE/Data Hold Time (to PDCLK)
MISCELLANEOUS TIMING CHARACTERISTICS
Wake-Up Time2
Fast Recovery
Full Sleep Mode
Minimum Reset Pulse Width High
DATA LATENCY (PIPE_LINE DELAY)
Data Latency, Single Tone or using Profiles
Frequency, Phase, Amplitude-to-DAC Output
Frequency, Phase-to-DAC Output
Amplitude-to-DAC Output
Data Latency using RAM Mode
Frequency, Phase-to-DAC Output
Amplitude-to-DAC Output
Data Latency, Sweep Mode
Frequency, Phase-to-DAC Output
Amplitude-to-DAC Output
Data Latency, 16-Bit Input Modulation Mode
Frequency, Phase-to-DAC Output
Conditions/Comments
±500 kHz
±125 kHz
±12.5 kHz
±500 kHz
±125 kHz
±12.5 kHz
±500 kHz
±125 kHz
±12.5 kHz
Low
High
High
Matched latency enabled and OSK
enabled
Matched latency enabled and OSK
disabled
Matched latency disabled
Matched latency disabled
Matched latency enabled/disabled
Matched latency enabled
Matched latency disabled
Matched latency enabled/disabled
Matched latency enabled
Matched latency disabled
Matched latency enabled
Matched latency disabled
Min Typ Max Unit
–87
dBc
–87
dBc
–91
dBc
–86
dBc
–86
dBc
–88
dBc
–84
dBc
–84
dBc
–85
dBc
70
4
4
2
5
0
11
Mbps
ns
ns
ns
ns
ns
ns
1
SYNC_CLK cycle
2
ns
0
ns
250
2
1
1
8
150
5
MHz
ns
ns
ms
SYSCLK cycles
μs
SYSCLK cycles3
91
SYSCLK cycles
79
SYSCLK cycles
79
SYSCLK cycles
47
SYSCLK cycles
94
SYSCLK cycles
106
SYSCLK cycles
58
SYSCLK cycles
91
SYSCLK cycles
91
SYSCLK cycles
47
SYSCLK cycles
103
SYSCLK cycles
91
SYSCLK cycles
Rev. 0 | Page 6 of 60
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