ADE7854AACPZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADE7854AACPZ' PDF : 96 Pages View PDF
ADE7854A/ADE7858A/ADE7868A/ADE7878A
HSDC Interface Timing
Table 5.
Parameter
HSA to HSCLK Edge
HSCLK Period
HSCLK Low Pulse Width
HSCLK High Pulse Width
Data Output Valid After HSCLK Edge
Data Output Fall Time
Data Output Rise Time
HSCLK Rise Time
HSCLK Fall Time
HSD Disable After HSA Rising Edge
HSA High After HSCLK Edge
Symbol
tSS
tSL
tSH
tDAV
tDF
tDR
tSR
tSF
tDIS
tSFS
Min
0
125
50
50
5
0
Max
Unit
ns
ns
ns
ns
40
ns
20
ns
20
ns
10
ns
10
ns
ns
ns
HSA
tSS
tSFS
HSCLK
tDAV
HSD
tSL
tSH
tSF
tSR
tDIS
MSB
INTERMEDIATE BITS
tDF
Figure 7. HSDC Interface Timing
LSB
tDR
Load Circuit for Timing Specifications
2mA
IOL
TO OUTPUT
PIN CL
50pF
800µA
IOH
1.6V
Figure 8. Load Circuit for Timing Specifications
Data Sheet
Rev. C | Page 12 of 96
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