ADE7854AACPZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADE7854AACPZ' PDF : 96 Pages View PDF
ADE7854A/ADE7858A/ADE7868A/ADE7878A
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Data Sheet
NC 1
PM0 2
PM1 3
RESET 4
DVDD 5
DGND 6
IAP 7
IAN 8
IBP 9
NC 10
ADE7854A/
ADE7858A/
ADE7868A/
ADE7878A
TOP VIEW
(Not to Scale)
30 NC
29 IRQ0
28 CLKOUT
27 CLKIN
26 VDD
25 AGND
24 AVDD
23 VAP
22 VBP
21 NC
NOTES
1. NC = NO CONNECT. THESE PINS ARE NOT CONNECTED
INTERNALLY. IT IS RECOMMENDED THAT THESE PINS
BE GROUNDED.
2. CREATE A SIMILAR PAD ON THE PCB UNDER THE
EXPOSED PAD. SOLDER THE EXPOSED PAD TO
THE PAD ON THE PCB TO CONFER MECHANICAL
STRENGTH TO THE PACKAGE. CONNECT THE
PADS TO AGND AND DGND.
Figure 9. Pin Configuration
Table 8. Pin Function Descriptions
Pin No.
Mnemonic Description
1, 10, 11, 21, NC
30, 31, 40
No Connect. These pins are not connected internally. It is recommended that these pins be grounded.
2
PM0
Power Mode Pin 0. The PM0 and PM1 pins together specify the power mode of the ADE7854A, ADE7858A,
ADE7868A, and ADE7878A (see Table 9).
3
PM1
Power Mode Pin 1. The PM1 and PM0 pins together specify the power mode of the ADE7854A, ADE7858A,
ADE7868A, and ADE7878A (see Table 9).
4
RESET
Reset Input, Active Low. In PSM0 mode, this pin must stay low for at least 10 µs to trigger a hardware reset.
5
DVDD
2.5 V Output of the Digital Low Dropout (LDO) Regulator. Decouple this pin with a 4.7 µF capacitor in parallel
with a ceramic 220 nF capacitor. Do not connect external active circuitry to this pin.
6
DGND
Ground Reference for the Digital Circuitry.
7, 8
IAP, IAN
Analog Inputs, Current Channel A. Current Channel A is used with the current transducers. The IAP (positive)
and IAN (negative) inputs are fully differential voltage inputs with a maximum differential level of ±0.5 V
peak. Channel A also has an internal PGA, which is set to the same value as the PGAs used by Channel B and
Channel C.
9, 12
IBP, IBN
Analog Inputs, Current Channel B. Current Channel B is used with the current transducers.. The IBP (positive)
and IBN (negative) inputs are fully differential voltage inputs with a maximum differential level of ±0.5 V
peak. Channel B also has an internal PGA, which is set to the same value as the PGAs used by Channel A and
Channel C.
13, 14
ICP, ICN
Analog Inputs, Current Channel C. Current Channel C is used with the current transducers. The ICP (positive)
and ICN (negative) inputs are fully differential voltage inputs with a maximum differential level of ±0.5 V
peak. Channel C also has an internal PGA, which is set to the same value as the PGAs used by Channel A and
Channel B.
15, 16
INP, INN
Analog Inputs, Neutral Current Channel N. Current Channel N is used with the current transducers. The INP
(positive) and INN (negative) inputs are fully differential voltage inputs with a maximum differential level of
±0.5 V peak. Channel N also has an internal PGA, which is separate from the PGA used by Channel A, Channel
B, and Channel C. The neutral current channel is available in the ADE7868A and ADE7878A only. In the
ADE7854A and ADE7858A, connect the INP and INN pins to AGND.
17
REFIN/OUT
The REFIN/OUT pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value
of 1.2 V. An external reference source with 1.2 V ± 8% can also be connected at this pin. In either case,
decouple REFIN/OUT to AGND with a 4.7 µF capacitor in parallel with a ceramic 100 nF capacitor. After a reset,
the on-chip reference is enabled.
Rev. C | Page 14 of 96
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