ADSP-21266SKSTZ-1C View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-21266SKSTZ-1C' PDF : 44 Pages View PDF
ADSP-21266
JTAG Test Access Port and Emulation
See Table 32 and Figure 27.
Table 32. JTAG Test Access Port and Emulation
Parameter
Min
Timing Requirements
tTCK
TCK Period
20
tSTAP
TDI, TMS Setup Before TCK High
5
tHTAP
TDI, TMS Hold After TCK High
6
tSSYS
System Inputs Setup Before TCK High1
7
tHSYS
System Inputs Hold After TCK High1
8
tTRSTW
TRST Pulse Width
4tCK
Switching Characteristics
tDTDO
TDO Delay from TCK Low
tDSYS
System Outputs Delay After TCK Low2
1 System Inputs = AD15–0, SPIDS, CLKCFG1–0, RESET, BOOTCFG1–0, MISO, MOSI, SPICLK, DAI_Px, FLAG3–0.
2 System Outputs = MISO, MOSI, SPICLK, DAI_Px, AD15–0, RD, WR, FLAG3–0, CLKOUT, EMU, ALE.
Max
7
10
TCK
TMS
TDI
TDO
SYSTEM
INPUTS
SYSTEM
OUTPUTS
tTCK
tSTAP
tDTDO
tSSYS
tDSYS
tHTAP
tHSYS
Figure 27. JTAG Test Access Port and Emulation
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Rev. B | Page 36 of 44 | May 2005
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