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ADSP-21371KSWZ-2A2 View Datasheet(PDF) - Analog Devices

Part Name
Description
MFG CO.
ADSP-21371KSWZ-2A2
ADI
Analog Devices ADI
'ADSP-21371KSWZ-2A2' PDF : 52 Pages View PDF
ADSP-21371/ADSP-21375
Power-Up Sequencing
The timing requirements for processor startup are given in
Table 13.
Note that during power-up, a leakage current of approximately
200 μA may be observed on the RESET pin. This leakage current
results from the weak internal pull-up resistor on this pin being
enabled during power-up.
Table 13. Power Up Sequencing Timing Requirements (Processor Startup)
Parameter
Min
Max
Unit
Timing Requirements
tRSTVDD
RESET Low Before VDDINT/VDDEXT On
0
ns
tIVDDEVDD
VDDINT on Before VDDEXT
–50
tCLKVDD1
CLKIN Valid After VDDINT/VDDEXT Valid
0
tCLKRST
CLKIN Valid Before RESET Deasserted
102
tPLLRST
PLL Control Setup Before RESET Deasserted
203
+200
ms
200
ms
μs
μs
Switching Characteristic
tCORERST
Core Reset Deasserted After RESET Deasserted
4096 × tCK + 2 × tCCLK 4, 5
1 Valid VDDINT/VDDEXT assumes that the supplies are fully ramped to their 1.2 and 3.3 volt rails. Voltage ramp rates can vary from microseconds to hundreds of milliseconds
depending on the design of the power supply subsystem.
2 Assumes a stable CLKIN signal, after meeting worst-case startup timing of crystal oscillators. Refer to your crystal oscillator manufacturer's datasheet for startup time. Assume
a 25 ms maximum oscillator startup time if using the XTAL pin and internal oscillator circuit in conjunction with an external crystal.
3 Based on CLKIN cycles.
4 Applies after the power-up sequence is complete. Subsequent resets require a minimum of four CLKIN cycles for RESET to be held low in order to properly initialize and
propagate default states at all I/O pins.
5 The 4096 cycle count depends on tSRST specification in Table 15. If setup time is not met, one additional CLKIN cycle may be added to the core reset time, resulting in 4097
cycles maximum.
RESET
VDDINT
VDDEXT
CLKIN
CLK_CFG1–0
RESETOUT
tRSTVDD
tIVDDEVDD
tCLKVDD
tCLKRST
tPLLRST
tCORERST
Figure 5. Power-Up Sequencing
Rev. C | Page 19 of 52 | September 2009
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