Qdatasheet_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

ADSP-2141L View Datasheet(PDF) - Analog Devices

Part Name
Description
MFG CO.
ADSP-2141L
ADI
Analog Devices ADI
'ADSP-2141L' PDF : 39 Pages View PDF
ADSP-2141L
CAPACITIVE LOADING
Figures 23 and 24 show the capacitive loading characteristics of
the ADSP-2141L.
18
T = +70؇C
16 VDD = 3.0V
14
12
10
8
6
4
2
0
0
50
100
150
200
250
300
CL – pF
Figure 23. Typical Output Rise Time vs. Load Capacitance,
CL (at Maximum Ambient Operating Temperature)
18
16
14
12
10
8
6
4
2
NOMINAL
–2
–4
0
50
100
150
200
250
CL – pF
Figure 24. Typical Output Valid Delay or Hold vs. Load
Capacitance, CL (at Maximum Ambient Operating
Temperature)
TEST CONDITIONS
Output Disable Time
Output pins are considered to be disabled when they have
stopped driving and started a transition from the measured
output high or low voltage to a high impedance state. The out-
put disable time (tDIS) is the difference of tMEASURED and tDECAY,
as shown in the Output Enable/Disable diagram. The time is the
interval from when a reference signal reaches a high or low
voltage level to when the output voltages have changed by 0.5 V
from the measured output high or low voltage. The decay time,
tDECAY, is dependent on the capacitive load, CL, and the current
load, iL, on the output pin. It can be approximated by the fol-
lowing equation:
from which
tDECAY
=
CL
• 0.5V
iL
tDIS = tMEASURED – tDECAY
is calculated. If multiple pins (such as the data bus) are disabled,
the measurement value is that of the last pin to stop driving.
INPUT
OR
OUTPUT
1.5V
1.5V
Figure 25. Voltage Reference Levels for AC Measure-
ments (Except Output Enable/Disable)
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high-impedance state to when they start
driving. The output enable time (tENA) is the interval from when
a reference signal reaches a high or low voltage level to when the
output has reached a specified high or low trip point, as shown
in the Output Enable/Disable diagram. If multiple pins (such as
the data bus) are enabled, the measurement value is that of the
first pin to start driving.
REFERENCE
SIGNAL
tMEASURED
VOH tDIS
(MEASURED)
OUTPUT
VOL
(MEASURED)
VOH (MEASURED) – 0.5V
VOL (MEASURED) +0.5V
tDECAY
tENA
2.0V
1.0V
VOH
(MEASURED)
VOL
(MEASURED)
OUTPUT STOPS
DRIVING
OUTPUT STARTS
DRIVING
HIGH-IMPEDANCE STATE. TEST CONDITIONS CAUSE
THIS VOLTAGE LEVEL TO BE APPROXIMATELY 1.5V.
Figure 26. Output Enable/Disable
IOL
TO
OUTPUT
PIN
50pF
+1.5V
IOH
Figure 27. Equivalent Device Loading for AC Measure-
ments (Including All Fixtures)
REV. 0
–33–
Share Link: GO URL

All Rights Reserved © qdatasheet.com  [ Privacy Policy ] [ Contact Us ]