ADSP-2141L View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-2141L' PDF : 39 Pages View PDF
ADSP-2141L
Parameter
Min
Max
Unit
Interrupts and Flags
Timing Requirements:
tIFS
IRQx, FI, or PFx Setup Before CLKOUT Low1, 2, 3, 4
tIFH
IRQx, FI, or PFx Hold After CLKOUT High1, 2, 3, 4
0.25tCK + 15
ns
0.25tCK
ns
Switching Characteristics:
tFOH
Flag Output Hold After CLKOUT Low5
tFOD
Flag Output Delay from CLKOUT Low5
0.5tCK – 7
ns
0.5tCK + 5 ns
NOTES
1If IRQx and FI inputs meet tIFS and tIFH setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on
the following cycle. (Refer to the Interrupt Controller Operation section in the Program Control chapter of the ADSP-2100 Family User’s Manual for further informa-
tion on interrupt servicing.)
2Edge-sensitive interrupts require pulsewidths greater than 10 ns; level-sensitive interrupts must be held low until serviced.
3IRQx = IRQ0, IRQ1, IRQ2, IRQL0, IRQL1, IRQE.
4PFx = PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7.
5Flag Outputs = PFx, FL0, FL1, FL2, Flag_out.
CLKOUT
FLAG
OUTPUTS
IRQx
FI
PFx
tFOD
tFOH
t IFH
t IFS
Figure 11. Interrupts and Flags
REV. 0
–21–
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