ADSP-2141L View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-2141L' PDF : 39 Pages View PDF
ADSP-2141L
Parameter
External Memory Read—ADSP-2141L DSP Initiated
Timing Requirements:
tRDD
Read Low to Data Valid
tAA
Address, xMS Valid to Data Valid
tSUR
Data Valid Before Read Deasserted
tRDH
Data Hold After Read Deasserted
Switching Characteristics:
tA
Clock to Address, xMS Active
tASR
Address, xMS Setup Before Read Low
tAH
Address, xMS Hold After Clock
tRDA
Address, xMS Hold After Read High
tCRD
Clock High to RD Low
tRP
Read Pulsewidth
tRWR
RD High to RD or WR Low
1. If wait-state(s) added, then referenced to last wait-state clock interval.
2. w = DSP wait state × tCK.
DSP CLOCK
OUT
EXT. ADDR
(A13–0)
PMS, DMSx,
BMS, IOMS,
CMS
EXT. RD
EXT. DATA
(D23–0)
25ns (REF @ 40MHz)
tA
t ASR
t CRD
t AA
t RP
tRDD
Min
Max
Unit
0.5tCK – 10 + w ns
0.75tCK – 11.5 + w ns
9
ns
0
ns
1
6
ns
0.25tCK – 4
ns
1
ns
0.25tCK – 3
ns
0.25tCK – 2
0.25tCK + 7
ns
0.5tCK – 5 + w
ns
0.5tCK –5
ns
t AH
t RDA
t RWR
tSUR
tRDH
Figure 16. External Memory Read – ADSP-2141L DSP Initiated
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