ADSP-2141L View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-2141L' PDF : 39 Pages View PDF
Parameter
Serial Ports
Timing Requirements:
tSCK
SCLK Period
tSCS
DR/TFS/RFS Setup Before SCLK Low
tSCH
DR/TFS/RFS Hold After SCLK Low
tSCP
SCLKIN Width
Switching Characteristics:
tCC
tSCDE
CLKOUT High to SCLKOUT
SCLK High to DT Enable
tSCDV
tRH
SCLK High to DT Valid
TFS/RFSOUT Hold After SCLK High
tRD
TFS/RFSOUT Delay from SCLK High
tSCDH
tTDE
DT Hold After SCLK High
TFS (Alt) to DT Enable
tTDV
TFS (Alt) to DT Valid
tSCDD
tRDV
SCLK High to DT Disable
RFS (Multichannel, Frame Delay Zero) to DT Valid
Min
50
4
7
15
0.25tCK
0
0
0
0
ADSP-2141L
Max
Unit
ns
ns
ns
ns
0.25tCK + 10
ns
ns
15
ns
ns
15
ns
ns
ns
14
ns
15
ns
15
ns
CLKOUT
SCLK
DR
TFSIN
RFSIN
RFSOUT
TFSOUT
DT
TFSOUT
ALTERNATE
FRAME MODE
RFSOUT
MULTICHANNEL MODE
FRAME DELAY 0
(MFD = 0)
TFSIN
ALTERNATE
FRAME MODE
RFSIN
MULTICHANNEL MODE
FRAME DELAY 0
(MFD = 0)
t CC
t CC
tSCS tSCH
t SCK
t SCP
t SCP
t RD
t RH
t SCDV
t SCDE
t TDE
t TDV
t RDV
t TDE
t TDV
t RDV
t SCDH
t SCDD
Figure 17. Serial Ports
REV. 0
–27–
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