ADSP-2141L View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-2141L' PDF : 39 Pages View PDF
ADSP-2141L
Parameter
IDMA Write, Short Write Cycle (IDMA Mode, Multiplex Bus)
Timing Requirements:
tIKW
tIWP
tIDSU
tIDH
MPLX9 Low Before Start of Write1
Duration of Write1, 2
MPLX_BUS Data Setup Before End of Write2, 3, 4
MPLX_BUS Hold After End of Write2, 3, 4
Switching Characteristic:
tIKHW
Start of Write to MPLX9 High
NOTES
1Start of Write = MPLX7 Low and MPLX6 Low.
2End of Write = MPLX7 High or MPLX6 High.
3If Write Pulse ends before MPLX9 Low, use specifications tIDSU, tIDH.
4If Write Pulse ends after MPLX9 Low, use specifications tIKSU, tIKH.
Min
Max
0
15
5
3
15
/ MPLX9 IACK
/ MPLX7 IS
/ MPLX6 IWR
/ MPLX_BUS IAD15–0
t IKW
t IKHW
t IWP
t IDSU
t IDH
DATA
Figure 19. IDMA Write, Short Write Cycle (IDMA Mode, Multiplex Bus)
Unit
ns
ns
ns
ns
ns
REV. 0
–29–
Share Link: 
